ISL62873 Datasheet, PDF (10/17 Pages) Intersil Corporation – PWM DC/DC Controller with VID Inputs for Portable GPU Core-Voltage Regulator

ISL62873
Where:
- t_SS is the soft-start delay
- I_SS is the soft-start current source at the 20µA limit
- V_START-UP is the setpoint reference voltage selected by
the state of the VID inputs at the time EN is asserted
- R_T is the sum of the R_SET programming resistors
Choosing the C_SOFT capacitor to meet the requirements of a
particular voltage-step delay t_VS is calculated with
Equation 13, which is written as:
C_SOFT
=
----------------------------------–---^t--^V----^S----------------------------------
⎛
⎜
⎝
R_T
⋅
L N(1
–
-^V----^N---_±-^E--_I--^WV----_S--–---_â‹--^V-_R---^O-_T----^L---^D--)_{⎠⎟⎞}
(EQ. 13)
Where:
- t_VS is the voltage-step delay
- V_NEW is the new setpoint voltage
- V_OLD is the setpoint voltage that V_NEW is changing
from
- I_VS is the ±100µA setpoint voltage-step current; positive
when V_NEW > V_OLD, negative when V_NEW < V_OLD
- R_T is the sum of the R_SET programming resistors
Fault Protection
Overcurrent
The overcurrent protection (OCP) setpoint is programmed
with resistor R_OCSET which is connected across the OCSET
and PHASE pins. Resistor R_O is connected between the VO
pin and the actual output voltage of the converter. During
normal operation, the VO pin is a high impedance path,
therefore there is no voltage drop across R_O. The value of
resistor R_O should always match the value of resistor
R_OCSET.
PHASE
L
DCR
I_L
+
V_DCR
_
R_OCSET
C_SEN
10µA
OCSET
+ ^{_ V}ROCSET
R_O
VO
V_O
C_O
FIGURE 6. OVERCURRENT PROGRAMMING CIRCUIT
Figure 6 shows the overcurrent set circuit. The inductor
consists of inductance L and the DC resistance DCR. The
inductor DC current I_L creates a voltage drop across DCR,
which is given by Equation 14:
V_DCR = I_L ⋅ DCR
(EQ. 14)
The I_OCSET current source sinks 10µA into the OCSET pin,
creating a DC voltage drop across the resistor R_OCSET,
which is given by Equation 15:
V_ROCSET = 10μA ⋅ R_OCSET
(EQ. 15)
The DC voltage difference between the OCSET pin and the
VO pin, which is given by Equation 16:
V_OCSET– V_VO = V_DCR– V_ROCSET =I_L ⋅DCR – I_OCSET⋅ R_OCSET
(EQ. 16)
The IC monitors the voltage of the OCSET pin and the VO
pin. When the voltage of the OCSET pin is higher than the
voltage of the VO pin for more than 10µs, an OCP fault
latches the converter off.
Component Selection for R_OCSET and C_SEN
The value of R_OCSET is calculated with Equation 17, which
is written as:
R_OCSET
=
I_{--O-----C-----}⋅_---D_-----C_-----R_---
I_OCSET
(EQ. 17)
Where:
- R_OCSET (Ω) is the resistor used to program the
overcurrent setpoint
- I_OC is the output DC load current that will activate the
OCP fault detection circuit
- DCR is the inductor DC resistance
For example, if I_OC is 20A and DCR is 4.5mΩ, the choice of
R_OCSET is = 20A x 4.5mΩ/10µA = 9kΩ.
Resistor R_OCSET and capacitor C_SEN form an R-C network
to sense the inductor current. To sense the inductor current
correctly not only in DC operation, but also during dynamic
operation, the R-C network time constant R_OCSET C_SEN
needs to match the inductor time constant L/DCR. The value
of C_SEN is then written as Equation 18:
C_SEN
=
--------------------^L----------------------
R_OCSET ⋅ DCR
(EQ. 18)
For example, if L is 1.5µH, DCR is 4.5mΩ, and R_OCSET is
9kΩ, the choice of C_SEN = 1.5µH/(9kΩ x 4.5mΩ) = 0.037µF.
When an OCP fault is declared, the PGOOD pin will
pull-down to 35Ω and latch off the converter. The fault will
remain latched until the EN pin has been pulled below the
falling EN threshold voltage V_ENTHF or if VCC has decayed
below the falling POR threshold voltage ^V_{VCC_THF}.
Undervoltage
The UVP fault detection circuit triggers after the FB pin
voltage is below the undervoltage threshold V_UVTH for more
than 2µs. For example, if the converter is programmed to
regulate 1.0V at the FB pin, that voltage would have to fall
below the typical V_UVTH threshold of 84% for more than 2µs
in order to trip the UVP fault latch. In numerical terms, that
would be 84% x 1.0V = 0.84V. When a UVP fault is declared,
the PGOOD pin will pull-down to 95Ω and latch-off the
10
FN6930.0
June 30, 2009