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ISL6563 Datasheet, PDF (11/19 Pages) Intersil Corporation – Two-Phase Multiphase Buck PWM Controller with Integrated MOSFET Drivers
ISL6563
TABLE 3. VRM10 VOLTAGE IDENTIFICATION
CODES
VID4 VID3 VID2 VID1 VID0 VID5
1
1
1
1
1
1
1
1
1
1
1
0
0
1
0
1
0
0
0
1
0
0\
1
1
0
1
0
0
1
0
0
1
0
0
0
1
0
1
0
0
0
0
0
0
1
1
1
1
0
0
1
1
1
0
0
0
1
1
0
1
0
0
1
1
0
0
0
0
1
0
1
1
0
0
1
0
1
0
0
0
1
0
0
1
0
0
1
0
0
0
0
0
0
1
1
1
0
0
0
1
1
0
0
0
0
1
0
1
0
0
0
1
0
0
0
0
0
0
1
1
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
1
1
1
0
1
1
1
1
1
0
0
1
1
1
0
1
1
1
1
1
0
1
0
1
1
1
0
0
1
1
1
1
0
0
0
1
1
0
1
1
1
1
1
0
1
1
0
1
1
0
1
0
1
1
1
0
1
0
0
1
1
0
0
1
1
1
1
0
0
1
0
1
1
0
0
0
1
1
1
0
0
0
0
1
0
1
1
1
1
1
0
1
1
1
0
1
0
1
1
0
1
1
0
1
1
0
0
1
0
1
0
1
1
1
0
1
0
1
0
1
0
1
0
0
1
1
0
1
0
0
0
VDAC
Off
Off
0.8375
0.8500
0.8625
0.8750
0.8875
0.9000
0.9125
0.9250
0.9375
0.9500
0.9625
0.9750
0.9875
1.0000
1.0125
1.0250
1.0375
1.0500
1.0625
1.0750
1.0875
1.1000
1.1125
1.1250
1.1375
1.1500
1.1625
1.1750
1.1875
1.2000
1.2125
1.2250
1.2375
1.2500
1.2625
1.2750
1.2875
1.300
1.3125
1.3250
1.3375
1.3500
1.3625
TABLE 3. VRM10 VOLTAGE IDENTIFICATION
CODES (Continued)
VID4 VID3 VID2 VID1 VID0 VID5
1
0
0
1
1
1
1
0
0
1
1
0
1
0
0
1
0
1
1
0
0
1
0
0
1
0
0
0
1
1
1
0
0
0
1
0
1
0
0
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
0
1
1
1
1
0
0
1
1
1
0
1
0
1
1
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
0
1
1
0
0
1
0
1
1
0
0
0
0
1
0
1
1
1
0
1
0
1
1
0
0
1
0
1
0
1
VDAC
1.3750
1.3875
1.4000
1.4125
1.4250
1.4375
1.4500
1.4625
1.4750
1.4875
1.5000
1.5125
1.5250
1.5375
1.5500
1.5625
1.5750
1.5875
1.6000
DYNAMIC VID (VID-ON-THE-FLY)
The ISL6563 is capable of executing on-the-fly output
voltage changes. The way the ISL6563 reacts to a change in
the VID code is dependent on the VID configuration. In
VRM9 or AMD Hammer settings, the ISL6563 checks for a
change in the VID code four times each switching cycle. The
VID code is the bit pattern present at pins VID4-VID0. If a
new code is established and it stays the same for 12
switching cycles, the ISL6563 begins changing the reference
by making one step change every four switching cycles until
it reaches the new VID code. Figure 5 depicts such a
transition, from 1.5V to 1.7V
01110
00110
VVID
VID CHANGE OCCURS HERE
1.5V
VREF (100mV/DIV)
1.5V
VOUT (100mV/DIV)
FIGURE 5. TYPICAL DYNAMIC-VID OPERATION, VRM9 DAC
SETTING
11
FN9126.8
June 10, 2010