82C54 Datasheet, PDF (7/18 Pages) Intel Corporation – CHMOS PROGRAMMABLE INTERVAL TIMER

82C54
COUNTER LATCH COMMAND
The second method uses the ‘‘Counter Latch Com-
mand’’ Like a Control Word this command is written
to the Control Word Register which is selected
when A₁ A₀ ^e 11 Also like a Control Word the
SC0 SC1 bits select one of the three Counters but
two other bits D5 and D4 distinguish this command
from a Control Word
A₁ A₀^e11 CS^e0 RD^e1 WR^e0
D₇ D₆ D₅ D₄ D₃ D₂ D₁ D₀
SC1 SC0 0 0 X X X X
SC1 SC0 - specify counter to be latched
SC1 SC0
Counter
0
0
0
0
1
1
1
0
2
1
1 Read-Back Command
D5 D4 - 00 designates Counter Latch Command
X - don’t care
NOTE
Don’t care bits (X) should be 0 to insure compatibility
with future Intel products
Figure 9 Counter Latching Command Format
The selected Counter’s output latch (OL) latches the
count at the time the Counter Latch Command is
received This count is held in the latch until it is read
by the CPU (or until the Counter is reprogrammed)
The count is then unlatched automatically and the
OL returns to ‘‘following’’ the counting element (CE)
This allows reading the contents of the Counters
‘‘on the fly’’ without affecting counting in progress
Multiple Counter Latch Commands may be used to
latch more than one Counter Each latched Coun-
ter’s OL holds its count until it is read Counter Latch
Commands do not affect the programmed Mode of
the Counter in any way
If a Counter is latched and then some time later
latched again before the count is read the second
Counter Latch Command is ignored The count read
will be the count at the time the first Counter Latch
Command was issued
With either method the count must be read accord-
ing to the programmed format specifically if the
Counter is programmed for two byte counts two
bytes must be read The two bytes do not have to be
read one right after the other read or write or pro-
gramming operations of other Counters may be in-
serted between them
Another feature of the 82C54 is that reads and
writes of the same Counter may be interleaved for
example if the Counter is programmed for two byte
counts the following sequence is valid
1 Read least significant byte
2 Write new least significant byte
3 Read most significant byte
4 Write new most significant byte
If a Counter is programmed to read write two-byte
counts the following precaution applies A program
must not transfer control between reading the first
and second byte to another routine which also reads
from that same Counter Otherwise an incorrect
count will be read
READ-BACK COMMAND
The third method uses the Read-Back command
This command allows the user to check the count
value programmed Mode and current state of the
OUT pin and Null Count flag of the selected coun-
ter(s)
The command is written into the Control Word Reg-
ister and has the format shown in Figure 10 The
command applies to the counters selected by set-
ting their corresponding bits D3 D2 D1 ^e 1
A0 A1 e 11 CS e 0 RD e 1 WR e 0
D₇ D₆ D₅
D₄
D₃
D₂
D₁ D₀
1 1 COUNT STATUS CNT 2 CNT 1 CNT 0 0
D₅ 0 e Latch count of selected counter(s)
D₄ 0 e Latch status of selected counter(s)
D₃ 1 e Select counter 2
D₂ 1 e Select counter 1
D₁ 1 e Select counter 0
D₀ Reserved for future expansion must be 0
Figure 10 Read-Back Command Format
The read-back command may be used to latch multi-
ple counter output latches (OL) by setting the
COUNT bit D5^e0 and selecting the desired coun-
ter(s) This single command is functionally equiva-
lent to several counter latch commands one for
each counter latched Each counter’s latched count
is held until it is read (or the counter is repro-
grammed) That counter is automatically unlatched
when read but other counters remain latched until
they are read If multiple count read-back commands
are issued to the same counter without reading the
7