82C54 Datasheet, PDF (16/18 Pages) Intel Corporation – CHMOS PROGRAMMABLE INTERVAL TIMER

82C54
A C CHARACTERISTICS (Continued)
WRITE CYCLE
Symbol
Parameter
t_AW
v Address Stable Before WR
t_SW
v CS Stable Before WR
t_WA
u Address Hold Time After WR
t_WW
WR Pulse Width
t_DW
u Data Setup Time Before WR
t_WD
u Data Hold Time After WR
t_RV
Command Recovery Time
82C54-2
Min
Max
0
0
0
95
95
0
165
Units
ns
ns
ns
ns
ns
ns
ns
CLOCK AND GATE
Symbol
t_CLK
t_PWH
t_PWL
T_R
t_F
t_GW
t_GL
t_GS
t_GH
T_OD
t_ODG
t_WC
t_WG
t_WO
t_CL
Parameter
Clock Period
High Pulse Width
Low Pulse Width
Clock Rise Time
Clock Fall Time
Gate Width High
Gate Width Low
u Gate Setup Time to CLK
u Gate Hold Time After CLK
v Output Delay from CLK
v Output Delay from Gate
CLK Delay for Loading⁽⁴⁾
Gate Delay for Sampling⁽⁴⁾
OUT Delay from Mode Write
CLK Set Up for Count Latch
82C54-2
Min
Max
100
DC
30⁽³⁾
50⁽³⁾
25
25
50
50
40
50⁽²⁾
100
100
0
55
b₅
40
240
b₄₀
40
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES
2 In Modes 1 and 5 triggers are sampled on each rising clock edge A second trigger within 70 ns for the 82C54-2 of the
rising clock edge may not be detected
3 Low-going glitches that violate t_PWH t_PWL may cause errors requiring counter reprogramming
4 Except for Extended Temp See Extended Temp A C Characteristics below
5 Sampled not 100% tested T_A e 25 C
6 If CLK present at T_WC min then Count equals Na2 CLK pulses T_WC max equals Count Na1 CLK pulse T_WC min to
T_WC max count will be either Na1 or Na2 CLK pulses
7 In Modes 1 and 5 if GATE is present when writing a new Count value at T_WG min Counter will not be triggered at T_WG
max Counter will be triggered
8 If CLK present when writing a Counter Latch or ReadBack Command at T_CL min CLK will be reflected in count value
latched at T_CL max CLK will not be reflected in the count value latched Writing a Counter Latch or ReadBack Command
between T_CL min and T_WL max will result in a latched count vallue which is g one least significant bit
EXTENDED TEMPERATURE (T_A ^{e b}40 C to ^a85 C for Extended Temperature)
Symbol
Parameter
82C54-2
Min
Max
t_WC
CLK Delay for Loading
b₂₅
25
t_WG
Gate Delay for Sampling
b₂₅
25
Units
ns
ns
16