82576EB Datasheet, PDF (4/34 Pages) Intel Corporation – LAN Access Division

Revisions - Intel^® 82576EB GbE Controller
Date
Revision
August 11, 2010
2.72
September 9, 2010
2.73
October 14, 2010
2.74
December 15, 2010
2.75
April 20, 2011
2.76
May 5, 2011
2.77
July 20, 2011
2.78
August 2, 2011
2.79
September 14, 2011 2.80
November 28, 2011
2.81
December 7, 2011
2.82
December 13, 2011
2.83
Description
Spec Clarifications added:
• 5. Use of Wake on LAN Together with Manageability
Spec Changes added:
• 1. Update to PBA Number EEPROM Word Format
Errata added:
• 37. TimeSync: Missing Tx timestamps in SerDes mode
• 38. Virtualization: Dropped Packets When Using VM-to-VM Switching
Spec Clarification added:
• 6. Critical Session (Keep PHY Link Up) Mode Does Not Block All PHY Resets
Caused by PCIe Resets - Moved from Errata.
Spec Change, language updated:
• 1. Update to PBA Number EEPROM Word Format
Explanation expanded to address confusion about number format.
Software Clarfication:
• 1. While In TCP Segmentation Offload, Each Buffer is Limited to 64 KB
Spec Clarification added:
• 7. SerDes: AN_TIMEOUT Only Works When Link Partner Idle
Errata added:
• 39. I2C Data Out Hold Time Violation
Spec Changes added:
• 2. PCIe: Device Control 2 Register Should Not Be Written While DMA Is
Enabled
• 3. Updates to PXE/iSCSI EEPROM Words
Errata added:
• 40. TSYNC: Auxiliary Timestamp from SDP is Unreliable
Spec Change added:
• 4. Updated Definition of SW EEPROM Port Identification LED Blinking (Word
0x4)
Spec Changes added:
• 5. SerDes Forced Mode Override EEPROM Setting
• 6. Update to the Sequence in Switching Between Media
Errata added:
• 41. NC-SI: Get Link Status Command Might Cause Corruption of PHY Registers
Software Clarification added:
• 2. Serial Interfaces Programmed By Bit Banging
Errata added:
• 42. NC-SI: Get NC-SI Pass-through Statistics Response Format
• Table 1, Product Identification and Packaging is an update. It replaces two
older tables. Introduces the A2 stepping. A2 is functionally the same as A1.
Errata added:
• 43. PCIe: Receiver Overflow Error .
• Added A2 information to status data for each errata.
• Added the following text in Section 1.20: “There is an internal designator
visible as a dash on the die side of some packages. It’s location may differ. The
mark (looks like a dash, approximately 300X1000 μm in size) does not impact
function.”
• Table 1, Product Identification and Packaging. A table note has been updated.
The new text is: “There is no die change for parts listed as A2. There are no
Form, Fit, or Function changes to this silicon. Intel anticipates no impact to
customers. This is an internal package change to provide a material solution
that is RoHS compliant; Intel qualified and certified this change in the same
way as it does for all products supplied to customers.”
Intel^® 82576EB GbE Controller
Specification Update
4
Revision: 2.85
September 2012