82576EB Datasheet, PDF (15/34 Pages) Intel Corporation – LAN Access Division

Intel^® 82576EB GbE Controller - Specification Clarifications
5. Use of Wake on LAN Together with Manageability
Clarification: The Wakeup Filter Control Register (WUFC) contains the NoTCO bit, which affects the
behavior of the wakeup functionality when manageability is in use. Note that if
manageability is not enabled, the value of NoTCO has no effect.
When NoTCO contains the hardware default value of 0b, any received packet that
matches the wakeup filters will wake the system. This could cause unintended wakeups
in certain situations. For example, if Directed Exact Wakeup is used and the
manageability shares the host's MAC address, IPMI packets that are intended for the BMC
wake the system, which might not be the intended behavior.
When NoTCO is set to 1b, any packet that passes the manageability filter, even if it also
is copied to the host, is excluded from the wakeup logic. This solves the previous
problem since IPMI packets do not wake the system. However, with NoTCO=1b,
broadcast packets, including broadcast magic packets, do not wake the system since they
pass the manageability filters and are therefore excluded.
Table 5. Effects of NoTCO
WoL Type
NoTCO
Shared MAC
Address
Unicast Packet
Broadcast Packet
Magic Packet
0b
Magic Packet
1b
Magic Packet
1b
Directed Exact
0b
Directed Exact
0b
Directed Exact
1b
-
OK
OK
Y
No wake
No wake
N
OK
No wake
Wake even if MNG packet. No
Y
way to talk to BMC without
N/A
waking host.
N
OK
N/A
-
OK
N/A
The Intel Windows* drivers set NoTCO by default.
If this is not the desired behavior, the EnableWakeOnManagmentOnTCO registry entry
can be used to change it starting with Intel LAN driver software release 15.5. Setting this
registry entry to 1b causes the driver to program NoTCO to 0b. A tool to modify the
registry entry can be provided.
Contact your Intel representative for access.
Workaround: N/A.
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6. Critical Session (Keep PHY Link Up) Mode Does Not Block All PHY Resets Caused by PCIe Resets
Clarification: D3 to D0 transition will cause a PHY reset even in Keep PHY Link Up mode. When Critical
Session Mode (Keep PHY Link Up) is enabled (via the NC-SI Set Intel Management
Control command or the SMBUS Management Control command), PCIe resets should not
cause a PHY reset. However, the following events will still cause a PHY reset:
• Transition from D3 to D0 without general PCIe reset (i.e. PMCSR[1:0] changed from
11 to 00 by configuration write)
• Function-level reset
Revision: 2.85
September 2012
Intel^® 82576EB GbE Controller
Specification Update
15