82576EB Datasheet, PDF (21/34 Pages) Intel Corporation – LAN Access Division

Intel^® 82576EB GbE Controller - Errata
1.5.4 Errata
1. Internal Copper PHY: Improperly Implements Auto-Negotiation Advertisement Register
Problem: The 82576 incorrectly transmits the link code word due to a write to register 4.
Implication: See the following notes on link code word bits:
Bits 4.7 and 4.8: Are always set in the base page transmission.
Bit 4.9: Represents 100BASE-T4 support. The 82576 does not support T4. It is unlikely
that the auto-negotiation feature of the 82576 will be used in an implementation to
advertise the presence of a T4 physical device. Therefore, the fact that this device does
not allow T4 to be advertised is not significant.
Bit 4.15: The 82576 always supports Next Page (regardless the value of bit 4.15). When
bit 4.15 is set to "one," the 82576 requires Register 7 (AN Next Page Transmit Register)
to be written to complete the Next Page Exchange. In this case, the 82576's Next Pages
do not correspond to Register 7, but contain valid 1000BASE-T Next Pages.
Workaround: Any write to register 4 should be followed with a restart of Auto-Negotiation by setting bit
0.9.
Status:
A1, A2 NoFix
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2. PCIe: Differential Return Loss More than Specified Value
Problem:
The PCIe transmitter's differential return loss is -9.7 dB instead of the -10 dB
requirement.
Implication: The out-of-specification return loss adds noise to the Tx line. Performance is not affected.
Workaround: None.
Status:
A1, A2 NoFix
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3. SGMII Counters Incorrectly Increment on Collision
Problem:
In SGMII mode/half duplex, the statistics counters listed below incorrectly increment
when a collision occurs:
Name
RLEC
CRCERRS
RFC
Definition
Length error counter
CRC error counter
receive frame counter
Location
0X4040
0x4000
0x40A8
Implication: Error counters may not be accurate.
Workaround: None.
Status:
A1, A2 NoFix
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Revision: 2.85
September 2012
Intel^® 82576EB GbE Controller
Specification Update
21