82576EB Datasheet, PDF (25/34 Pages) Intel Corporation – LAN Access Division

Intel^® 82576EB GbE Controller - Errata
Status:
A1, A2 NoFix
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17. SMBus: Unread Packets Received On One Port May Cause Loss of Ability To Receive on Other Port
Problem:
The device’s two ports share memory. When packets are received by one of the ports and
not read, they are stored in the shared memory. When this memory fills up, no more
packets may be received.
Implication: The MC should be aware of the above behavior.
Workaround: 1. Make use of a SMBus alert timeout mechanism.
2. Read data and/or momentarily disable receives by the other port.
Status:
A1, A2 NoFix
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18. JTAG: Instruction Register Functionality Doesn't Meet IEEE Std 1149-1-2001
Problem:
If UPDATE_IR directly follows CAPTURE_IR, the active instruction is DEVID. This is not as
specified by the INSTRUCTION_CAPTURE attribute.
Implication: The value from CAPTURE_IR cannot be relied upon.
Workaround: Shift in an instruction; do not rely on the value from CAPTURE_IR.
Status:
A1, A2 NoFix
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19. LED Stays On When SerDes Is Powered Down
Problem:
The LED may remain on in D3 power state when SerDes power down is enabled (EEPROM
word 0xf, bit 1; register CTRL_EXT 0x0018, bit 18). If a link is established when the
device enters D3 power state and the LED mode is programmed to reflect LINK
indication, the LED remains on even though the SerDes interface powers down.
Implication: LED incorrectly reflects link is up when there is no link (as SerDes is powered off).
Workaround: When using the Intel Fiber adapters based on the 82576, the driver should disable optics
(when going to D3) by setting SDP3 to 1.
Status:
A1, A2 NoFix
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20. PCIe Elastic Buffer Noise Immunity Is Not Optimized
Problem:
The PCIe elastic buffer is used to synchronize between the clock generated by the clock
recovery circuit and the internal clock. During electrical idle, in the absence of an input
signal, the clock recovery circuit can be disturbed by noise and move the elastic buffer fill
level away from the optimum value.
In the EEPROM, control bits were implemented to maintain stability during electrical idle.
In the default EEPROM image provided, these bits were not set correctly.
Implication: In cases of increased noise levels during Electrical Idle, elastic buffer instability may
cause a link training failure when exiting from L0s or (in rare instances) L1 state.
Revision: 2.85
September 2012
Intel^® 82576EB GbE Controller
Specification Update
25