80C186XL Datasheet, PDF (31/48 Pages) Intel Corporation – 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS

80C186XL 80C188XL
AC SPECIFICATIONS (Continued)
RESET AND HOLD HLDA TIMINGS
T_A ^e 0 C to ^a70 C V_CC ^e 5V g10%
All timings are measured at 1 5V and 50 pF loading on CLKOUT unless otherwise noted
All output test conditions are with C_L ^e 50 pF
For AC tests input V_IL ^e 0 45V and V_IH ^e 2 4V except at X1 where V_IH ^e V_CC ^b 0 5V
Symbol
Parameter
80C186XL25
Min Max
Values
80C186XL20
Min Max
Test
80C186XL12 Unit _Conditions
Min Max
80C186XL RESET AND HOLD HLDA TIMING REQUIREMENTS
T_RESIN RES Setup
15
15
15
ns
T_HVCL HOLD Setup⁽¹⁾
8
10
15
ns
80C186XL GENERAL TIMING RESPONSES (Listed More Than Once)
T_CLAZ Address Float Delay
T_CLAX 20 T_CLAX 20 T_CLAX 25 ns
T_CLAV Address Valid Delay
3
20
3
22
3
36 ns
80C186XL RESET AND HOLD HLDA TIMING RESPONSES
T_CLRO Reset Delay
17
22
33 ns
T_CLHAV HLDA Valid Delay
3
17
3
22
3
33 ns
T_CHCZ Command Lines Float Delay
22
25
33 ns
T_CHCV Command Lines Valid Delay
20
26
36 ns
(after Float)
NOTE
1 To guarantee recognition at next clock
31
31