80960KA Datasheet, PDF (19/43 Pages) Intel Corporation – EMBEDDED 32-BIT MICROPROCESSOR

80960KA
2.8. AC Specifications
This section describes the AC specifications for the
80960KA pins. All input and output timings are
specified relative to the 1.5 V level of the rising edge
of CLK2. For output timings the specifications refer to
the time it takes the signal to reach 1.5 V.
For input timings the specifications refer to the time at
which the signal reaches (for input setup) or leaves
(for hold time) the TTL levels of LOW (0.8 V) or HIGH
(2.0 V). All AC testing should be done with input
voltages of 0.4 V and 2.4 V, except for the clock
(CLK2), which should be tested with input voltages of
0.45 V and 0.55 V_CC.
EDGE
A
B
C
D
A
B
C
CLK2
0.8V
1.5V
OUTPUTS:
LAD 31:0
ADS
W/R, DEN
BE3:0
HLDA
CACHE
LOCK, INTA
1.5V
1.5V
T₆
T₉
1.5V VALID OUTPUT 1.5V
1.5V
T₈
T₈
T₁₃
T₁₄
ALE
DT/R
INPUTS:
LAD31:0
BADAC
IAC/INT0, INT1
INT2/INTR, INT3
HOLD
LOCK
READY
1.5V
1.5V
T₇
T₆
1.5V
VALID OUTPUT
T₉
1.5V
T₁₀ T₁₁
2.0V 2.0V
0.8V 0.8V
T₁₂ T₁₁
2.0V 2.0V
0.8V 0.8V
VALID INPUT
Figure 14. Drive Levels and Timing Relationships for 80960KA Signals
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