KU386 Datasheet, PDF (1/102 Pages) Intel Corporation – SX MICROPROCESSOR

Intel386^TM SX MICROPROCESSOR
Y Full 32-Bit Internal Architecture
8- 16- 32-Bit Data Types
8 General Purpose 32-Bit Registers
Y Runs Intel386TM Software in a Cost
Effective 16-Bit Hardware Environment
Runs Same Applications and O S ’s
as the Intel386^TM DX Processor
Object Code Compatible with 8086
80186 80286 and Intel386^TM
Processors
Y High Performance 16-Bit Data Bus
16 20 25 and 33 MHz Clock
Two-Clock Bus Cycles
Address Pipelining Allows Use of
Slower Cheaper Memories
Y Integrated Memory Management Unit
Virtual Memory Support
Optional On-Chip Paging
4 Levels of Hardware Enforced
Protection
MMU Fully Compatible with Those of
the 80286 and Intel386 DX CPUs
Y Virtual 8086 Mode Allows Execution of
8086 Software in a Protected and
Paged System
Y Large Uniform Address Space
16 Megabyte Physical
64 Terabyte Virtual
4 Gigabyte Maximum Segment Size
Y Numerics Support with the Intel387TM
SX Math CoProcessor
Y On-Chip Debugging Support Including
Breakpoint Registers
Y Complete System Development
Support
Software C PL M Assembler
Debuggers PMON-386 DX
ICE^TM-386 SX
Y High Speed CHMOS IV Technology
Y Operating Frequency
Standard
(Intel386 SX -33 -25 -20 -16)
Min Max Frequency
(4 33 4 25 4 20 4 16) MHz
Low Power
(Intel386 SX -33 -25 -20 -16 -12)
Min Max Frequency
(2 33 2 25 2 20 2 16 2 12) MHz
Y 100-Pin Plastic Quad Flatpack Package
(See Packaging Outlines and Dimensions 231369)
The Intel386^TM SX Microprocessor is an entry-level 32-bit CPU with a 16-bit external data bus and a 24-bit
external address bus The Intel386 SX CPU brings the vast software library of the Intel386^TM Architecture to
entry-level systems It provides the performance benefits of a 32-bit programming architecture with the cost
savings associated with 16-bit hardware systems
Intel386^TM SX Pipelined 32-Bit Microarchitecture
240187 – 47
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COPYRIGHT INTEL CORPORATION 1995
January 1994
Order Number 240187-008