IA6805E2_07 Datasheet, PDF (7/33 Pages) InnovASIC, Inc – Microprocessor Unit

IA6805E2
Microprocessor Unit
As of Production Version 00
29 August 2007
Functional Description
Memory:
The MPU is capable of addressing 8192 bytes of memory and I/O registers. The locations
are divided into internal memory space and external memory space as shown in Figure 5.
The first 128 bytes of memory contain internal port I/O locations, timer locations, and 112
bytes of RAM. The MPU can read from or write to any of these locations. During program
reads from on chip locations, the MPU accepts data only from the addressed on chip
location. Any read data appearing on the input bus is ignored. The shared stack area is used
during interrupts or subroutine calls. A maximum of 64 bytes of RAM is available for stack
usage. The stack pointer is set to $7f at power up. The unused bytes of the stack can be used
for data storage or temporary work locations, but care must be taken to prevent it from
being overwritten due to stacking from an interrupt or subroutine call.
0
ACCESS VIA ¹²⁷
PAGE 0
DIRECT
128
ADDRESS
255
256
I/O PORTS
TIMER RAM
$0000
$007F
$0080
$00FF
$0100
0
PORT A DATA REGISTER
1
PORT B DATA REGISTER
2
EXTERNAL MEMORY SPACE
3
EXTERNAL MEMORY SPACE
4
PORT A DATA DIRECTION REGISTER
5
PORT B DATA DIRECTION REGISTER
6
EXTERNAL MEMORY SPACE
7
EXTERNAL MEMORY SPACE
8
TIMER DATA REGISTER
9
TIMER CONTROL REGISTER
10
EXTERNAL MEMORY
SPACE (8064 BYTES)
EXTERNAL MEMORY SPACE
15
16
63
64
TIMER INTERRUPT FROM WAIT STATE ONLY $1FF6 - $1FF7
INTERRUPT
VECTORS
TIMER INTERRUPT
EXTERNAL INTERRUPT
SWI
$1FF8 - $1FF9
$1FFA - $1FFB
$1FFC - $1FFD
8191
RESET
$1FFE - $1FFF
127
RAM
(112 BYTES)
STACK
(64 BYTES MAX)
Figure 5. Memory Map
Copyright © 2007
©
IA211081401-03
Page 7 of 33
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