IA70C20 Datasheet, PDF (23/27 Pages) InnovASIC, Inc – 8-Bit Microcontroller

IA70C20
8-Bit Microcontroller
Data Sheet
August 19, 2008
TMS7000 Family Instruction Overview (Continued)
Mnemonic
Opcode Bytes Cycles Status
Tc(C) C N Z I
TSTA
B0
1
6
0RRx
TSTB
C1
1
6
0RRx
XCHB A
Rn
XOR B,A
Rs,A
Rs,B
Rs,Rd
%>iop,A
%>iop,B
%>iop,Rd
XORP A,Pd
B,Pd
%>iop,Pd
B6
1
D6
2
65
1
15
2
35
2
45
3
25
2
55
2
75
3
85
2
95
2
A5
3
6
0RRx
8
5
0RRx
8
8
10
7
7
9
10
0RRx
9
11
Note: Add two to cycle count if branch is taken
Legend:
0
Status bit set always to 0.
1
Status bit set always to 1
R
Status bit set to a 1 or a 0 depending on results of operation.
x
Status bit not affected.
b
Bit ( ) affected.
Ofst Offset
Operation Description
0  (C)
Set carry bit; set sign and zero flags on
the value of register A.
0  (C)
Set carry bit; set sign and zero flags on
the value register B.
(B)  (Rn)
Swap the contents of register B with (d).
(s) XOR (Rd)  (Rd)
Logically exclusive OR the source and
destination operands, store at the
destination address.
(s) XOR (Pd)  (Pd)
Logically exclusive OR the source and
destination operands, store at the
destination.
IA211030117-05
Page 23 of 27
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