IA70C20 Datasheet, PDF (21/27 Pages) InnovASIC, Inc – 8-Bit Microcontroller

IA70C20
8-Bit Microcontroller
Data Sheet
August 19, 2008
TMS7000 Family Instruction Overview (Continued)
Mnemonic
Opcode Bytes Cycles Status
Tc(C) C N Z I
MPY B,A
6C
1
44
0RRx
Rs,A
1C
2
47
Rs,B
3C
2
47
Rn,Rn
4C
3
49
%>iop,A
2C
2
46
%>iop,B
5C
2
46
%>iop,Rn
7C
3
48
NOP
00
1
4
xxxx
OR B,A
Rs,A
Rs,B
Rd,Rd
%>iop,A
%>iop,B
%>iop,Rd
ORP A,Pd
B,Pd
%>iop,Pd
64
1
14
2
34
2
44
3
24
2
54
2
74
3
84
2
94
2
A4
3
5
0RRx
8
8
10
7
7
9
10
0RRx
9
11
POP A
B
Rd
B9
1
C9
1
D9
2
6
0RRx
6
8
POP ST
08
1
6
Loaded
from stack
PUSH A
B
Rs
PUSH ST
B8
1
6
xxxx
C8
1
6
D8
2
8
0E
1
6
xxxx
RETI
0B
1
9
Loaded
from stack
RETS
0A
1
7
xxxx
Note: Add two to cycle count if branch is taken
Legend:
0
Status bit set always to 0.
1
Status bit set always to 1
R
Status bit set to a 1 or a 0 depending on results of operation.
x
Status bit not affected.
b
Bit ( ) affected.
Ofst Offset
Operation Description
(s) x (Rn)  (A,B)
Multiply the source and destination
operands, store the result in registers A
(MSB) and B (LSB).
(PC) + 1  (Rd)
Add 1 to the PC
(s) OR (Rd)  (Rd)
Logically OR the source and destination
operands, and store the results at the
destination address.
(s) OR (Pd)  (Pd)
Logically OR the source and destination
operands, and store the results at the
destination address.
((SP))  (Rd)
(SP) – 1  (SP)
Copy the last byte on the stack into the
destination address.
((SP))  (ST)
(SP) – 1  (SP)
Replace the status register with the last
byte of the stack.
(SP) + 1  (SP)
(Rs)
 (SP)
Copy the operand onto the stack.
(SP) + 1
 (SP)
(Status register)  ((SP))
Copy the status register onto the stack.
((SP))  (PC) LSByte
(SP) –1  (SP)
((SP))  (PC) MSByte
(SP) –1  (SP)
((SP))  status register
(SP) –1  (SP)
((SP))  (PC LSB)
(SP) –1  (SP)
((SP))  (PC MSB)
(SP) –1  (SP)
IA211030117-05
Page 21 of 27
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