TLE7181EM Datasheet, PDF (9/29 Pages) Infineon Technologies AG – H-Bridge and Dual Half Bridge Driver IC

H-Bridge and Dual Half Bridge Driver IC
TLE7181EM
General Product Characteristics
The PWM frequency is limited by thermal constraints and the maximum duty cycle (minimum charging time of
bootstrap capacitor).
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go
to www.jedec.org.
Pos. Parameter
Symbol
Limit Values
Unit Conditions
Min. Typ. Max.
4.3.1 Junction to Case¹⁾
R_thJC
–
4.3.2 Junction to Ambient¹⁾
R_thJA
–
1) Not subject to production test, specified by design.
–
5
35
–
K/W –
K/W ²⁾
2) Exposed Heatslug Package use this sentence: Specified R_thJA value is according to Jedec JESD51-2,-5,-7 at natural
convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner
copper layers (2 x 70µm Cu, 2 x 35µm Cu). Where applicable a thermal via array under the exposed pad contacted the first
inner copper layer.
4.4
Table 2
Default State of Inputs
Default State of Inputs (if left open)
Characteristic
Default state of PWM and DIR
State
Low
Default state of DT
Default state of ENA
OPEN
Low
Default state of SCDL
OPEN
Default state of DRVDIS
High
Remark
Low side MOSFETs off and Highside
MOSFETs on
maximum deadtime
Output stages disabled device in sleep
mode
Short circuit detection deactivation &
warning
All output stages off & no error will be
reported
Data Sheet
9
Rev 1.1, 2010-09-30