BTM7755G Datasheet, PDF (8/24 Pages) Infineon Technologies AG – High Current H-Bridge Trilith IC 3G

High Current H-Bridge
BTM7755G
General Product Characteristics
5.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go
to www.jedec.org.
Pos. Parameter
Symbol
Limit Values
Unit Conditions
5.3.1
5.3.2
5.3.3
5.3.4
Thermal Resistance
Junction to Soldering Point, Low Side Switch
R_thjSP(LS) = ΔT_j(LS)/ P_v(LS)
Thermal Resistance
Junction to Soldering Point, High Side Switch
R_thjSP(HS) = ΔT_j(HS)/ P_v(HS)
Thermal Resistance
Junction to Soldering Point, both switches
R_thjSP= max[ΔT_j(HS), ΔT_j(LS)] /
(P_v(HS) + P_v(LS))
Thermal Resistance
Junction-Ambient
Min.
R_thjSP(LS) –
R_thjSP(HS) –
R_thjSP
–
R_thja
–
Typ.
–
–
–
46
Max.
29
K/W ¹⁾
29
K/W ¹⁾
29
K/W ¹⁾
–
K/W ¹⁾; ²⁾
1) Not subject to production test, specified by design.
2) Specified R_thja value is according to Jedec JESD51-2, -7 at natural convection on FR4 2s2p board; The product
(chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Transient thermal impedance Z_thja
Figure 5 is showing the typical transient thermal impedance of high side or low side switch of BTM7755G mounted
according to JEDEC JESD51-7 at natural convection on FR4 2s2p board. The device (chip+package) was
simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu). For the
simulation each chip was separately powered with 1W at an ambient temperature T_a of 85°C.
50
45
40
35
30
25
20
15
10
5
0
0,001
0,01
High side sw itch / Low side sw itch
0,1
1
10
t_pulse [s]
100
1000
Figure 5 Typical transient thermal impedance of BTM7755G on JESD51-7 2s2p board
(1W each chip (separately heated), T_a = 85°C, single pulse)
Data Sheet
8
Rev. 2.0, 2010-05-28