ICE3GS03LJG Datasheet, PDF (7/25 Pages) Infineon Technologies AG – Of f-Line SMPS Current Mode Controller wi th integrated 500V Startup Cell

F3 PWM controller
ICE3GS03LJG
Functional Description
3 Functional Description
All values which are used in the functional description
are typical values. For calculating the worst cases the
min/max values which can be found in section 4
Electrical Characteristics have to be considered.
3.1 Introduction
ICE3GS03LJG is a 130KHz version of ICE3AS03LJG
which is an enhanced version of the F3 PWM controller
(ICE3xS02) for the low to medium power application.
The particular enhanced features are the built-in
features for soft start, blanking window and frequency
jitter. It also provides the flexibility to increase the
blanking window by simply adding capacitor in BL pin.
To increase the robustness and flexibility of the
protection feature, an external latch-off enable feature
is added. Moreover, the proven outstanding features in
F3 PWM controller are still remained such as the active
burst mode, propagation delay compensation,
modulated gate drive, protection for Vcc overvoltage,
over temperature, short winding, short diode, over load,
open loop, Vcc undervoltage and short optocoupler.
The intelligent Active Burst Mode at Standby Mode can
effective obtain the lowest Standby Power at minimum
load and no load conditions. After entering this burst
mode, there is still a full control of the power conversion
by the secondary side via the same optocoupler that is
used for the normal PWM control. The response on
load jumps is optimized. The voltage ripple on V_out is
minimized. V_out is on well controlled in this mode.
The usual externally connected RC-filter in the
feedback line after the optocoupler is integrated in the
IC to reduce the external part count.
Furthermore, a high voltage Startup Cell is integrated
into the IC which is switched off once the Undervoltage
Lockout on-threshold of 18V is exceeded. The external
startup resistor is no longer necessary as this Startup
Cell can directly connected to the input bulk capacitor.
Power losses are therefore reduced. This increases the
efficiency under light load conditions drastically.
Adopting the BiCMOS technology, it can further
decrease the power consumption and provide a even
better standby input power. Besides, it also increases
the design flexibility as the Vcc voltage range is
extended to 25V.
The built-in soft start time at 10ms can provide
sufficient timing to reduce the over-stress at power
MOSFET and the output rectifier during startup.
There are 2 modes of blanking time for high load
jumps; the basic mode and the extendable mode. The
blanking time for the basic mode is set at 20ms while
the extendable mode will increase the blanking time at
basic mode by adding external capacitor at the BL pin.
During this time window the overload detection is
disabled. With this concept no further external
components are necessary to adjust the blanking
window.
In order to increase the robustness and safety of the
system, the IC provides 2 levels of protection modes:
Latched Off Mode and Auto Restart Mode. The
Latched Off Mode is only entered under dangerous
conditions which can damage the SMPS if not switched
off immediately. A restart of the system can only be
done by recycling the AC line. In addition, for this
enhanced version, there is an external Latch Enable
function provided to increase the flexibility in protection.
When the BL pin is pulled down to less than 0.33V, the
Latch Off Mode is triggered.
The Auto Restart Mode reduces the average power
conversion to a minimum under unsafe operating
conditions. This is necessary for a prolonged fault
condition which could otherwise lead to a destruction of
the SMPS over time. Once the malfunction is removed,
normal operation is automatically retained after the
next Start Up Phase.
The internal precise peak current control reduces the
costs for the transformer and the secondary diode. The
influence of the change in the input voltage on the
maximum power limitation can be avoided together
with the integrated Propagation Delay Compensation.
Therefore the maximum power is nearly independent
on the input voltage, which is required for wide range
SMPS. Thus there is no need for the over-sizing of the
SMPS, e.g. the transformer and the output diode.
Furthermore, it implements the frequency jitter mode to
the switching clock and modulated gate drive signal at
the Gate pin such that the EMI noise will be effectively
reduced.
3.2
Power Management
The Undervoltage Lockout monitors the external
supply voltage V_VCC. When the SMPS is plugged to the
main line, the internal Startup Cell is biased and starts
to charge the external capacitor C_VCC which is
connected to the VCC pin. This VCC charge current is
controlled to 0.9mA by the Startup Cell. When the V_VCC
exceeds the on-threshold V_CCon=18V, the bias circuit
are switched on. Then the Startup Cell is switched off
by the Undervoltage Lockout and therefore no power
losses present due to the connection of the Startup Cell
to the Drain voltage. To avoid uncontrolled ringing at
switch-on a hysteresis start up voltage is implemented.
The switch-off of the controller can only take place after
Active Mode was entered and V_VCC falls below 10.5V.
The maximum current consumption before the
controller is activated is about 250mA.
When V_VCC falls below the off-threshold V_CCoff=10.5V,
the bias circuit switched off and the soft start counter is
Version 2.0
7
1 Nov 2010