HYS64D32020GDL Datasheet, PDF (7/31 Pages) Infineon Technologies AG – 200-Pin Small Outline Dual-In-Line Memory Modules

HYS64D[1600x/32020]GDL–[5/6/7/8]–B
Small Outline DDR SDRAM Modules
Overview
Table 2 Ordering Information
Type
Compliance Code
PC3200 (CL=3)
HYS64D32020GDL-5-B PC3200S–3033–0–A1
Description
SDRAM Technology
two ranks 256 MB SO-DIMM 256 Mbit (× 16)
PC2700 (CL=2.5)
HYS64D16000GDL–6–B
HYS64D16001GDL–6–B
HYS64D32020GDL–6–B
PC2700S–2533–0–C1
PC2700S–2533–0–C1
PC2700S–2533–0–A1
one rank 128 MB SO-DIMM
one rank 128 MB SO-DIMM
two ranks 256 MB SO-DIMM
256 MBit (× 16)
256 MBit (× 16)
256 MBit (× 16)
PC2100 (CL=2)
HYS64D16000GDL–7–B
HYS64D16001GDL–7–B
HYS64D32020GDL–7–B
PC2100S–2033–0–C1
PC2100S–2033–0–C1
PC2100S–2033–0–A1
one rank 128 MB SO-DIMM
one rank 128 MB SO-DIMM
two ranks 256 MB SO-DIMM
256 MBit (× 16)
256 MBit (× 16)
256 MBit (× 16)
PC1600 (CL=2)
HYS64D16000GDL–8–B
HYS64D32020GDL–8–B
PC1600S–2022–0–C1
PC1600S–2022–0–A1
one rank 128 MB SO-DIMM 256 MBit (× 16)
two ranks 256 MB SO-DIMM 256 MBit (× 16)
Notes
1. All part numbers end with a place code designating the silicon-die revision. Reference information available on
request. Example: HYS64D32020GDL-6-B, indicating rev. B dies are used for SDRAM components.
2. The Compliance Code is printed on the module labels describing the speed sort (for example “PC2700”), the
latencies and SPD code definition (for example “2033–0” means CAS latency of 2.0 clocks, RCD¹⁾ latency of
3 clocks, Row Precharge latency of 3 clocks, and JEDEC SPD code definiton version 0), and the Raw Card
used for this module.
1) RCD: Row-Column-Delay
Data Sheet
7
V1.2, 2003-08