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TC1912 Datasheet, PDF (52/68 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller
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PRELIMINARY
Timing for SDRAM Access Signals
(Operating Conditions apply; CL = 50 pF)
Parameter
CKE high from EBUCLK
CKE low from EBUCLK
A(23:0) output valid from EBUCLK
A(23:0) output hold from EBUCLK
CS(6:0) low from EBUCLK
CS(6:0) high from EBUCLK
RAS low from EBUCLK
RAS high from EBUCLK
CAS low from EBUCLK
CAS high from EBUCLK
RD/WR low from EBUCLK
RD/WR high from EBUCLK
BC(3:0) low from EBUCLK
BC(3:0) high from EBUCLK
AD(31:0) output valid from EBUCLK
AD(31:0) output hold from EBUCLK
AD(31:0) input setup to EBUCLK
AD(31:0) input hold from EBUCLK
TC1912
Symbol
Limits
min. max.
t1 CC -
7.0
t2 CC 2.0 -
t3 CC -
7.0
t4 CC 2.0 -
t5 CC -
7.0
t6 CC 2.0 -
t7 CC -
7.0
t8 CC 2.0 -
t9 CC -
7.0
t10 CC 2.0
-
t11 CC -
7.0
t12 CC 2.0
-
t13 CC -
7.0
t14 CC 2.0
-
t15 CC -
7.7
t16 CC 2.0
-
t17 SR 2.0
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t18 SR 4.0
-
ns
Data Sheet
48
V 1.0, 2003-10
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