TDA7200 Datasheet, PDF (25/49 Pages) Infineon Technologies AG – ASK/FSK Single Conversion Receiver

TDA7200
Applications
C
Pins: ₂₆
peak detector
25
56k
390k
data slicer
U_threshold
CP
Figure 8 Data Slicer Threshold Generation Utilising the Peak Detector
3.6
ASK/FSK-Data Path Functional Description
The TDA7200 is containing an ASK/FSK switch which can be controlled via Pin 15
(MSEL). This switch is actually consisting of 2 operational amplifiers that are having a
gain of 1 in case of the ASK amplifier and a gain of 11 in case of the FSK amplifier in
order to achieve an appropriate demodulation gain characteristic. In order to
compensate for the DC-offset generated especially in case of the FSK PLL demodulator
there is a feedback connection between the threshold voltage of the bit slicer comparator
(Pin 20) to the negative input of the FSK switch amplifier.
In ASK-mode alternatively to the voltage at Pin 20 (SLN) a value of approx. 87% of the
peak-detector output-voltage at Pin 26 (PDO) can be used as the slicer-reference level.
The slicing reference level is generated by an internal voltage divider (R_T1int, R_T2int),
which is applied on the peak detector output.
The selection between these modes is controlled by Pin 16 (SSEL), as described in
Section 3.5.
This is shown in Figure 9.
Data Sheet
25
V 1.0, 2007-05-02