TDA7200 Datasheet, PDF (15/49 Pages) Infineon Technologies AG – ASK/FSK Single Conversion Receiver

TDA7200
2.3
Functional Block Diagram
Functional Description
VCC
IF
Filter
LNO
6
MI
MI
X
IFO
8 9 12
LIM
LIM
X
17 18
MSEL
H=ASK
L=FSK
15
RF
LNI
3 _LNA
TAGC
4
TDA 7200
LIMITER
FSK
PLL Demod
-
+ FSK
-ASK
+
VCC
14
DGND
13
2,7 5,10
OTA
:2
VCO
: 64
Φ
DET
Loop
Filter
CRYSTAL
OSC
1
28
VCC AGND
Crystal
Figure 2 Block Diagram
FFB
OPP
22
21
SLP
19
OP
SLN
20
Logic
-
+ CM
16 SSEL
25 DATA
+ CP
-
DATA-
SLICER
PEAK
DETECTOR
26
PDO
23 THRES
U REF
AGC
Reference
24 3VOUT
Bandgap
Reference
11
27
PTST
PDWN
2.4
Functional Block Description
2.4.1 Low Noise Amplifier (LNA)
The LNA is an on-chip cascode amplifier with a voltage gain of 15 to 20dB. The gain
figure is determined by the external matching networks situated ahead of LNA and
between the LNA output LNO (Pin 6) and the Mixer Inputs MI and MIX (Pins 8 and 9).
The noise figure of the LNA is approximately 3dB, the current consumption is 500µA.
The gain can be reduced by approximately 18dB. The switching point of this AGC action
can be determined externally by applying a threshold voltage at the THRES pin (Pin 23).
This voltage is compared internally with the received signal (RSSI) level generated by
the limiter circuitry. In case that the RSSI level is higher than the threshold voltage the
LNA gain is reduced and vice versa. The threshold voltage can be generated by
attaching a voltage divider between the 3VOUT pin (Pin 24) which provides a
temperature stable 3V output generated from the internal bandgap voltage and the
THRES pin as described in Section 3.1. The time constant of the AGC action can be
determined by connecting a capacitor to the TAGC pin (Pin 4) and should be chosen
along with the appropriate threshold voltage according to the intended operating case
and interference scenario to be expected during operation. The optimum choice of AGC
time constant and the threshold voltage is described in Section 3.1.
Data Sheet
15
V 1.0, 2007-05-02