PEB20550 Datasheet, PDF (192/407 Pages) Infineon Technologies AG – ICs for Communications

PEB 20550
PEF 20550
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rate. Frames are delimited by an 8 kHz frame synchronization signal (FSC). The bit
timing and FSC position is identical to the non-multiplexed IOM-1 case.
The line card version of the IOM^®-2 provides a connection path between line
transceivers (ISDN) or codecs (analog), and the line card controller, the EPIC or ELIC;
the line card controller provides the connection to the switch backbone. The IOM-2 bus
time-multiplexes data, control, and status information for up to 8 ISDN transceivers or up
to 16 codec/filters over a single full-duplex interface.
Figure 58 shows the IOM-2 frame structure for the line card. It consists of 8 individual
and independent IOM channels, each having a structure similar to the IOM-1 channel
structure. The main difference compared to IOM-1 is the more powerful monitor channel
performance. Monitor messages of unlimited length can now be transferred at a variable
speed, controlled by a handshake procedure using the MR and MX bits. The C/I channel
can have a width of 4 bits for ISDN applications or of 6 bits for analog signaling
applications.
FSC
(8 kHz)
DCL
(4096 kHz)
DD#
(2048 kbit/s)
DU#
(2048 kbit/s)
Time-Slot
Number
IOM ^R Ch. 0 IOM ^R Ch. 1 IOM ^R Ch. 2 IOM ^R Ch. 3 IOM ^R Ch. 4 IOM ^R Ch. 5 IOM ^R Ch. 6 IOM ^R Ch. 7
IOM ^R Ch. 0 IOM ^R Ch. 1 IOM ^R Ch. 2 IOM ^R Ch. 3 IOM ^R Ch. 4 IOM ^R Ch. 5 IOM ^R Ch. 6 IOM ^R Ch. 7
012345678
31
B1 Channel
8 Bits
B1 : 64 kbit/s Channel
B2 : 64 kbit/s Channel
D : 16 kbit/s Channel
C/I : Command/Indication Channel
SIG : Signaling Channel
MR : Monitor Handshake Bit "Receive"
MX : Monitor Handshake Bit "Transmit"
B2 Channel
8 Bits
Monitor Channel
Control Channel
8 Bits
8 Bits
ISDN:
D
C/I
MM
RX
Analog:
SIG
MM
RX
ITD08037
Figure 58
IOM^®-2 Frame Structure for Line Card Applications
Semiconductor Group
192
01.96