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TLE7182EM Datasheet, PDF (14/28 Pages) Infineon Technologies AG – H-Bridge and Dual Half Bridge Driver IC
H-Bridge and Dual Half Bridge Driver IC
TLE7182EM
Description and Electrical Characteristics
Electrical Characteristics MOSFET Drivers
VS = 7.0 to 34V, Tj = -40 to +150°C all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos. Parameter
Symbol
Limit Values
Unit Conditions
Min. Typ. Max.
5.1.24 High level output voltage (in
passive clamping)1)
VGxxUV
–
–
1.2
V
Sleep mode or
VS_UVLO
5.1.25 Pull-down resistor at BHx to GND RBHUVx –
–
85
kΩ Sleep mode or
VS_UVLO
5.1.26 Pull-down resistor at VREG to GND RVRUV –
–
30
kΩ Sleep mode or
VS_UVLO
5.1.27 Bias current into BHx
IBHx
–
–
150
µA
VCBS>5V;
no switching
5.1.28 Bias current out of SHx
ISHx
–
5.1.29 Bias current out of SL
ISL
–
Dead time & input propagation delay times
40
–
µA
VSHx=VSL;
ENA=HIGH;
affected highside
output stage static
on;
VCBS>5V
–
1.4
mA 0≤VSHx≤VVS+1V;
ENA=HIGH;
no switching;
VCBS>5V
5.1.30
5.1.31
Min. internal dead time
Dead time deviation between
channels
tDT_MIN
0.08 0.11 0.2
µs
–
dtDT2
-15 –
15
%
–
5.1.32 Dead time deviation between
channels LSoff -> HS on
dtDT2
-12 –
12
%
–
5.1.33 Dead time deviation between
channels HSoff -> LS on
dtDT2
-12 –
12
%
–
5.1.34 Input propagation time (low on)
tP(ILN)
0
5.1.35 Input propagation time (low off)
tP(ILF)
0
5.1.36 Input propagation time (high on) tP(IHN)
0
5.1.37 Input propagation time (high off) tP(IHF)
0
5.1.38 Absolute input propagation time tP(diff)
–
difference between above
propagation times
100 200 ns
100 200 ns
100 200 ns
100 200 ns
50
100 ns
CLoad=10nF;
RLoad=1Ω
VREG
5.1.39 VREG output voltage
5.1.40
5.1.41
VREG over current limitation
Voltage drop between Vs and
VREG
VVREG
11
12.5 14
V
VVS≥13.5V;
ILoad=-35mA
IVREGOCL 100
–
500
mA
–3)
VVsVREG –
–
0.5
V
VVS≥7V;
ILoad=-35mA;
Ron operation
Data Sheet
14
Rev 1.1, 2010-09-30