ICE3AR10080CJZ Datasheet, PDF (14/33 Pages) Infineon Technologies AG – Off-Line SMPS Current Mode Controller with integrated 800V CoolMOS® and Startup cell (brownout & CCM) in DIP-7

CoolSET^®-F3R80
ICE3AR10080CJZ
Functional Description
3.6.1
Leading Edge Blanking
V_Sense
V_csth
t_LEB = 220ns/180ns
t
Figure 19 Leading Edge Blanking
Whenever the integrated CoolMOS^® is switched on, a
leading edge spike is generated due to the primary-
side capacitances and reverse recovery time of the
secondary-side rectifier. This spike can cause the gate
drive to switch off unintentionally. In order to avoid a
premature termination of the switching pulse, this spike
is blanked out with a time constant of t_LEB = 220ns for
normal load and t_LEB = 180ns for burst mode.
slope is depending on the AC input voltage.
Propagation Delay Compensation is integrated to
reduce the overshoot due to dI/dt of the rising primary
current. Thus the propagation delay time between
exceeding the current sense threshold V_csth and the
switching off of the integrated CoolMOS^® is
compensated over temperature within a wide input
range. Current Limiting is then very accurate.
For the inherit influence of the CCM operation, the final
Vcs can not be constant in whole line range as in DCM.
This ICE3ARxx80CJZ has implemented with 2
compensation curves for the compensation so that the
maximum power can be close. One of the curve is used
when the time range is larger than 4ms and the other is
for lower than 4ms.
The Propagation Delay Compensation is realized by
means of a dynamic threshold voltage V_csth (Figure 21).
In case of a steeper slope the switch off of the driver is
earlier to compensate the delay.
V_{OSC max. Duty Cycle}
3.6.2
Combined OPP curve considering
Propagation Delay and Slope
Compensation
The ICE3ARxx80CJZ has combined the propagation
delay, CCM inherit reduced power effect and the slope
compensation effect for the overcurrent control.
It employs the dynamic threshold voltage V_csth with 2
steps slope compensation to achieve the closed over
current for whole input voltage range.
In case of overcurrent detection, there is always
propagation delay to switch off the integrated
CoolMOS^®. An overshoot of the peak current I_peak is
induced to the delay, which depends on the ratio of dI/
dt of the peak current (Figure 20).
I_Sense
I_peak2
I_peak1
I_Limit
Signal2
I_Overshoot2
Signal1
t_{Propagation Delay}
I_Overshoot1
V_Sense
V_csth
off time
Propagation Delay _t
Signal1
Signal2
t
Figure 21 Dynamic Voltage Threshold V_csth
A typical measured Vsense vs dVsense/dt is plotted in
Figure 22 for reference.
t
Figure 20 Current Limiting
The overshoot of Signal2 is larger than of Signal1 due
to the steeper rising waveform. This change in the
Figure 22
Overcurrent Shutdown
Version 2.0
14
11 Jan 2012