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1EDS20I12SV Datasheet, PDF (14/33 Pages) Infineon Technologies AG – Single-channel isolated IGBT Driver
EiceDRIVER™ Safe
1EDS - slew rate control IGBT driver IC
4.2.1
Input side
The driver is supplied with 5 V between terminals VCC1 to GND1. This supply voltage manages the basic
functions of the control side. The control side contains a second voltage domain for the logic input signals INP,
INN, and EN. This special voltage domain is supplied by the terminals PADP and PADN and can range from
3.3V over 5V to 15V. It is mandatory to connect directly the terminals PADN and GND1. It is important to note,
that the voltage domains VCC1 and PADP have independent undervoltage lockout levels and both domains
must be supplied appropriately for operation.
VCC1 can be shorted to GND1 in order to deactivate the driver. No turn-on signals will be transmitted from the
input to the output side even if terminal VCC1 is left floating. Therefore, the IGBT won’t be turned on.
4.2.2
Output side
The EiceDRIVER™ 1EDS20I12SV is designed to support both bipolar and unipolar power supply
configurations. The driver IC is typically supplied with a positive voltage of 15 V on terminal VCC2 and a
negative voltage of -8 V on terminal VEE2, if configured for bipolar supply. The driver IC is typically supplied
with a positive voltage of 15 V on terminal VCC2 for a unipolar supply configuration. VEE2 and GND2 have to
be connected together as short as possible in this case.
4.3
Non-inverting and inverting input terminals INP and INN
There are two input modes to control the IGBT. In non-inverting mode, terminal INP controls the driver output
while terminal INN is set to low. In inverting mode, terminal INN controls the driver output while terminal INP is
set to high. A low signal at terminal INN will activate the output ON. A minimum input pulse width is defined to
suppress potential glitches.
4.4
Driver output terminal ON
The output stage consists of the internal regulation circuit inside the driver, an external sense resistor RSENSE,
and up to three external P-channel transistors placed in parallel. The recommended P-channel transistor is a
BSD314SPE (OptiMOS™-P 3, 30 V, 140 mΩ).
After a short propagation delay, the IGBT is switched on by a regulated current source. The entire turn-on
procedure is separated into three phases according to Figure 4: the preboost, the turn-on, and the VCC2
clamping phase.
The preboost phase controls a high current to drive the gate of the IGBT. This brings the gate voltage from its
negative level to a voltage slightly lower than the gate-emitter threshold voltage if the IGBT, i.e. VGATE < VGE(th),
within a period of typ. 135 ns. The value of the preboost current IPRB is proportional to the voltage VPRB at
terminal PRB. The maximum voltage VPRB against VEE2 is 5 V. The preboost current IPRB is defined as:
|
|
(1)
The change from the preboost phase into the turn-on phase needs less than 25 ns. This time must be
considered for the setting of the preboost current amplitude in order not to overcharge the gate during the
preboost phase.
The gate current during the turn-on phase can be selected out of 11 levels for the proper adjustment of the turn-
on transition. The fine granularity between levels 1 and 10 allows accurate slope control. It behaves similar as a
traditional driver at level 11. The driver controls the voltage drop across the sense resistor RS. The
corresponding gate current Igg is
(2)
The selection of the gate current for the turn-on phase is accomplished with terminal SPEED on the input side.
Terminal SPEED is an input terminal with voltage levels between 0 V and 3.3 V. The lowest voltage at terminal
SPEED corresponds with the highest gate current level, e.g. by connecting SPEED to GND1.
Target datasheet
14
<Revision 0.73>, 05.06.2014