XC2361B Datasheet, PDF (113/128 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2361B, XC2363B, XC2364B, XC2365B
XC2000 Family / Value Line
Electrical Parameters
duration of an asynchronous READY signal for safe synchronization is one CLKOUT
period plus the input setup time.
An active READY signal can be deactivated in response to the trailing (rising) edge of
the corresponding command (RD or WR).
If the next bus cycle is controlled by READY, an active READY signal must be disabled
before the first valid sample point in the next bus cycle. This sample point depends on
the programmed phases of the next cycle.
tp_D
CLKOUT
RD, WR
D15-D0
(read)
D15-D0
(write)
READY
Synchronous
READY
Asynchron.
Figure 25 READY Timing
tp_E
tp_RDY
tp_F
t10
t20
t31
t₃₀
Data In
t₂₅
Data Out
t31
t31
t30
t30
Not Rdy READY
t₃₁
t₃₁
t₃₀
t₃₀
Not Rdy READY
MC_ X_EBCREADY
Data Sheet
113
V1.2, 2010-04