ICE1CS02 Datasheet, PDF (11/27 Pages) Infineon Technologies AG – Combi PFC/ PWM Controller

Combi PFC/ PWM Controller
ICE1CS02
Functional Description
V_IN (VAC)
VCC > V_CCUVLO
V_INMIN(1)
VCC<V_CCUVLO
IC’s
State
Normal
Operation
t
BOP ^{IC OFF}
(1) _{VINMIN where BOP activates depends on the output power}
Figure 7 V_IN Related Protection Features
V_OUT
V_OUT,Rated
set by pin 3
100%
Vin
D1
R2
VINS
Brown-Out
Protection _{IVINSmax = 100µA typ @}
VINS_HYS = 2.5V
1.25V
C5
Turn Off
Gate
C1 _R1
VINS_HYS
R3
Gm = 1mA / V
Figure 9 PFC Brown Out Protection (BOP)
OLP
PCL
OVP
20%
t
OLP
3.4.5
Peak Current Limit (PCL)
The IC is designed not to support any output power
that corresponds to a voltage lower than -0.68V at the
ISENSE pin. A further increase in the inductor current,
which results in a lower ISENSE voltage, will activate
the Peak Current Limitation (PCL) protection.
Figure 8 V_OUT Related Protection Features
The following sections describe the functionality of
these protection features.
3.4.4
Brown-Out Protection (BOP)
Brown-out occurs when the input voltage V_IN falls below
the minimum input voltage of the design (i.e. 85V for
universal input voltage range) and the VCC has not
entered into the V_CCUVLO level yet. For a system without
BOP, the boost converter will increasingly draw a
higher current from the mains at a given output power
which may exceed the maximum design values of the
input current. When the input voltage V_IN fall below a
voltage with hystersis, both set externally by resistor/
capacitor/diode network as shown in Figure 9, the PFC
portion will stop switching. When the input voltage V_IN
exceeds the voltage set externally. The hysteresis
prevents the system to oscillate between normal and
standby mode.
IC’s _Normal
State Operation
I_L(max)
PCL
0
-0.68V
V_ISENSE
Figure 10 PCL Protection as function of V_ISENSE
Due to the internal parameter tolerance, the maximum
inductor current is
I_L(max)
=
0---.--6---8-
R1
The IC provides a cycle by cycle peak current limitation
(PCL). It is active when the voltage at pin 16 (PFC
ISENSE) reaches -0.68V. This voltage is amplified by
OP1 by a factor of -1.43 and connected to comparator
C2 with a reference voltage of 1.0V as shown in Figure
11. The overall time delay for PCL is about 200ns ~
500ns depending on the Isense voltage level.
Version 1.0
11
25 July 2008