ICS831724I Datasheet, PDF (9/24 Pages) Integrated Device Technology – LVCMOS interface levels for all control inputs

ICS831724I Data Sheet
Parameter Measurement Information
3.3V±0.3V
V_DD
33Ω
HCSL
33Ω
IREF
GND
475Ω
0V
50Ω
49.9Ω
50Ω
49.9Ω
Qx
2pF
nQx
2pF
3.3V HCSL Output Load AC Test Circuit 1
DIFFERENTIAL CLOCK DATA MULTIPLEXER
3.3V±0.3V
V_DD
HCSL
IREF
GND
SCOPE
0V
This load condition is used for I_DD, tsk(o), tsk(pp), tsk(i), t_PD, odc
and tjit measurements.
3.3V HCSL Output Load AC Test Circuit 2
V_DD
nCLK[0, 1]
V
PP
CLK[0, 1]
GND
Cross Points
V
CMR
Differential Input Level
Part 1
nQx
Qx
nQy ^{Par t 2}
Qx
t sk(pp)
Part-to-Part Skew
nQx
Qx
nQy
Qy
t sk(o)
Output Skew
nCLK[0, 1]
CLK[0, 1]
nQ[A:D]
Q[A:D]
t_PD
Propagation Delay
ICS831724AKI REVISION A MAY 16, 2013
9
©2013 Integrated Device Technology, Inc