ICS831724I Datasheet, PDF (19/24 Pages) Integrated Device Technology – LVCMOS interface levels for all control inputs

ICS831724I Data Sheet
3. Calculations and Equations.
The purpose of this section is to calculate power dissipation on the IC per HCSL output pair.
HCSL output driver circuit and termination are shown in Figure 5.
VDD
DIFFERENTIAL CLOCK DATA MULTIPLEXER
I_OUT = 17mA
R_REF =
475 ± 1%
V_OUT
R_L
50
IC
Figure 5. HCSL Driver Circuit and Termination
HCSL is a current steering output which sources a maximum of 17mA of current per output. To calculate worst case on-chip power dissipation,
use the following equations which assume a 50 load to ground.
The highest power dissipation occurs at V_DD__MAX.
Power = (V_{DD_MAX} – V_OUT) * I_OUT,
since V_OUT = I_OUT * R_L
Power = (V_{DD_MAX} – I_OUT * R_L) * I_OUT
Power = (3.6V – 17mA * 50) * 17mA
Total Power Dissipation per output pair = 46.8mW
ICS831724AKI REVISION A MAY 16, 2013
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