ICS831724I Datasheet, PDF(6/24 Page) Integrated Device Technology – LVCMOS interface levels for all control inputs

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

ICS831724I Datasheet, PDF (6/24 Pages) Integrated Device Technology – LVCMOS interface levels for all control inputs

◁

ICS831724I Data Sheet

DIFFERENTIAL CLOCK DATA MULTIPLEXER

Table 5B. HCSL AC Characteristics, VDD = 3.3V Â± 0.3V, TA = -40Â°C to 85Â°C

Symbol

Parameter

Test Conditions

fOUT

tjit

Output Frequency

Buffer Additive Phase

Jitter, RMS

100MHz, Integration Range:

12kHz â 20MHz

tPD

Propagation Delay;

NOTE 1, 3

Any CLK, nCLK to any Q, nQ

tsk(o)

Output Skew; NOTE 3,15

Across all outputs

tsk(i)

Input Skew; NOTE 2, 3

tsk(pp)

Part-to-Part Skew;

NOTE 3, 4

MUXISOL

Rising

Edge Rate

Falling

Edge Rate

TSTABLE

Mux Isolation

Rising Edge Rate;

NOTE 5, 6

Falling Edge Rate;

NOTE 5, 6

Time before VRB is

allowed; NOTE 5, 7

Æ = 100MHz

fOUT ï£ï 125MHzï

fOUT ï¾ï 125MHzï

fOUT ï£ï 125MHzï

fOUT ï¾ï 125MHzï

VRB

Ringback Voltage;

NOTE 5, 7

VMAX

Absolute Maximum Output

Voltage; NOTE 8, 9

VMIN

Absolute Minimum Output

Voltage; NOTE 8, 10

VCROSS

Absolute Crossing Voltage;

NOTE 8, 11, 12

ïVCROSS

Total Variation of VCROSS

over all edges;

NOTE 8, 11, 13

odc

Output Duty Cycle;

NOTE 14

fOUT ï£ï 125MHzï

fOUT ï¾ï 125MHzï

Minimum Typical Maximum Units

350

MHz

0.357

0.480

2.7

3.9

175

165

450

0.6

4.2

V/ns

0.6

6.8

V/ns

0.6

4.5

V/ns

0.6

6.7

V/ns

500

-100

100

1150

-300

200

550

140

NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is

mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium

has been reached under these conditions.

NOTE 1: Measured from the differential input crossing point to the differential output crossing point.

NOTE 2: Defined as skew between input paths on the same device, using the same input signal levels, measured at one specific output at the

differential cross points.

NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.

NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature, same frequency and

with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.

NOTE 5: Measurement taken from differential waveform.

NOTE 6: Measurement from -150mV to +150mV on the differential waveform (derived from Q minus nQ). The signal must be monotonic

through the measurement region for rise and fall time. The 300mV measurement window is centered on the differential zero crossing.

NOTE 7: TSTABLE is the time the differential clock must maintain a minimum Â±150mV differential voltage after rising/falling edges before it is

allowed to drop back into the VRB Â±100 differential range. See Parameter Measurement Information Section.

NOTE 8: Measurement taken from single-ended waveform.

NOTE 9: Defined as the maximum instantaneous voltage including overshoot. See Parameter Measurement Information Section.

NOTE 10: Defined as the minimum instantaneous voltage including undershoot. See Parameter Measurement Information Section.

Notes continued on next page.

NOTE 11: Measured at crossing point where the instantaneous voltage value of the rising edge of Q equals the falling edge of nQ.

See Parameter Measurement Information Section

ICS831724AKI REVISION A MAY 16, 2013

▷