ICS9FG1904B-1 Datasheet, PDF (8/22 Pages) Integrated Circuit Systems – Frequency Generator for CPU, PCIe Gen 1, PCIe Gen 2 & FBD

Integrated
Circuit
Systems, Inc.
ICS9FG1904B-1
Electrical Characteristics - DIF 0.7V Current Mode Differential Pair
T_A = 0 - 70°C; V_DD = 3.3 V +/-5%; C_L =2pF, R_S=33.2Ω, R_P=49.9Ω, Ι_REF = 475Ω
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS NOTES
Current Source Output
Impedance
Zo¹
V_O = V_x
3000
Ω
1
Voltage High
Voltage Low
VHigh
VLow
Statistical measurement on single
ended signal using oscilloscope
math function.
660
-150
850
1,3
mV
150
1,3
Max Voltage
Min Voltage
Vovs
Vuds
Measurement on single ended
signal using absolute value.
-300
1150
mV
1
1
Crossing Voltage (abs) Vcross(abs)
250
550
mV
1
Crossing Voltage (var)
d-Vcross Variation of crossing over all edges
140
mV
Long Accuracy
Average period
Absolute min period
Rise Time
Fall Time
Rise Time Variation
Fall Time Variation
Duty Cycle
Jitter, Cycle to cycle
ppm
Tperiod
T_absmin
t_r
t_f
d-t_r
d-t_f
d_t3
t_JCYC-CYC
t_JBYP
see Tperiod min-max values
400MHz nominal
400MHz spread
333.33MHz nominal
333.33MHz spread
266.66MHz nominal
266.66MHz spread
200MHz nominal
200MHz spread
166.66MHz nominal
166.66MHz spread
133.33MHz nominal
133.33MHz spread
100.00MHz nominal
100.00MHz spread
400MHz nominal/spread
333.33MHz nominal/spread
266.66MHz nominal/spread
200MHz nominal/spread
166.66MHz nominal/spread
133.33MHz nominal/spread
100.00MHz nominal/spread
V_OL = 0.175V, V_OH = 0.525V
V_OH = 0.525V V_OL = 0.175V
0
2.4993
2.4993
2.9991
2.9991
3.7489
3.7489
4.9985
4.9985
5.9982
5.9982
7.4978
7.4978
9.9970
9.9970
2.4143
2.9141
3.6639
4.8735
5.8732
7.3728
9.8720
175
175
Measurement from differential
wavefrom
45
PLL mode,
from differential wavefrom
Bypass mode as additive jitter
0
ppm
2.5008
ns
2.5133
ns
3.0009
ns
3.016
ns
3.7511
ns
3.77
ns
5.0015
ns
5.0266
ns
6.0018
ns
6.0320
ns
7.5023
ns
7.5400
ns
10.0030 ns
10.0533 ns
ns
ns
ns
ns
ns
ns
ns
700
ps
700
ps
125
ps
125
ps
55
%
50
ps
50
ps
Notes:
1.Guaranteed by design and characterization, not 100% tested in production.
2. All Long Term Accuracy and Clock Period specifications are guaranteed assuming that the input frequency meets CK410 accuracy requirements
3.IREF = VDD/(3xRR). For RR = 475Ω (1%), IREF = 2.32mA. IOH = 6 x IREF and VOH = 0.7V @ ZO=50Ω.
4. Measured into fixed 2 pF load cap. Input to output skew is measured at the first output edge following the corresponding input.
5. Measured from differential cross-point to differential cross-point
6. All Bypass Mode Input-to-Output specs refer to the timing between an input edge and the specific output edge created by it.
7. This device does not introduce any ppm errors to the input clock.
1
1,2,7
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1
1
1
1
1
1,4,5
1,4
1255B—08/03/07
8