ICS87951I-147 Datasheet, PDF (8/15 Pages) Integrated Device Technology – LOW SKEW, 1-TO-9 DIFFERENTIAL-TOLVCMOS ZERO DELAY BUFFER

ICS87951I-147
LOW SKEW, 1-TO-9, DIFFERENTIAL-TO-LVCMOS ZERO DELAY BUFFER
1.65V±5%
PARAMETER MEASUREMENT INFORMATION
1.25V±5%
V_DDA,
V_DDO
LVCMOS
GND
SCOPE
Qx
-1.65V±5%
3.3V OUTPUT LOAD AC TEST CIRCUIT
V_DD
nCLK1
V
PP
CLK1
Cross Points
V
CMR
GND
DIFFERENTIAL INPUT LEVEL
QA, QB,
QCx,
QDx
V
DDO
2
tcycle n
V
DDO
2
➤
tcycle n+1
t jit(cc) = tcycle n –tcycle n+1
1000 Cycles
CYCLE-TO-CYCLE JITTER
V
DDO
2
➤
QAx, QBx,
QCx, QDx
t _PW
V
DDO
2
t
PERIOD
odc = ^{t PW} x 100%
t _PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
V_DDA,
V_DDO
LVCMOS
GND
SCOPE
Qx
-1.25V±5%
2.5V OUTPUT LOAD AC TEST CIRCUIT
V
DDO
Qx
2
V
DDO
Qy
2
t sk(o)
OUTPUT SKEW
20%
Clock
Outputs
80%
t_R
80%
t_F
20%
OUTPUT RISE/FALL TIME
nCLK1
CLK0,
CLK1
V_DD
EXT_FB
2
➤ t (Ø)
tjit(Ø) = t(Ø) — t(Ø) mean = Phase Jitter
t(Ø) mean = Static Phase Offset
(where t(Ø) is any random sample, and t(Ø) mean is the average
of the sampled cycles measured on controlled edges)
PHASE JITTER AND STATIC PHASE OFFSET
IDT^™ / ICS^™ DIFFERENTIAL-TO-LVCMOS ZERO DELAY BUFFER
8
ICS87951I-147 REV A JUNE 21, 2006