ICS87951I-147 Datasheet, PDF (5/15 Pages) Integrated Device Technology – LOW SKEW, 1-TO-9 DIFFERENTIAL-TOLVCMOS ZERO DELAY BUFFER

ICS87951I-147
LOW SKEW, 1-TO-9, DIFFERENTIAL-TO-LVCMOS ZERO DELAY BUFFER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V_DD
4.6V
Inputs, V
I
-0.5V to V + 0.5 V
DDA
Outputs, V_O
-0.5V to V_DDO + 0.5V
Package Thermal Impedance, θ_JA 42.1°C/W (0 lfpm)
Storage Temperature, T_STG
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional op-
eration of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
TABLE
4A. POWER
SUPPLY
DC
CHARACTERISTICS,
V
DDA
=
V
DDO
=
3.3V±5%,
TA
=
-40°C
TO
85°C
Symbol Parameter
Test Conditions
Minimum Typical
V_DDA
V_DDO
I_DDO
I_DDA
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
All V_DD pins
3.135
3.3
3.135
3.3
Maximum
3.465
3.465
115
20
Units
V
V
mA
mA
TABLE 4B. POWER SUPPLY DC CHARACTERISTICS, V_DDA = V_DDO = 2.5V±5%, TA = 0°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
V
DDA
V_DDO
I_DDO
I_DDA
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
All V_DD pins
2.375
2.5
2.375
2.5
Maximum
2.625
2.625
75
12
Units
V
V
mA
mA
TABLE 4C. DC CHARACTERISTICS, V_DDA = V_DDO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
DIV_SELA:DIV_SELD,
V_IH
Input High Voltage EXT_FB, MR/nOE,
2
PLL_SEL, CLK_SEL
DIV_SELA:DIV_SELD,
EXT_FB, MR/nOE,
-0.3
V_IL
Input Low Voltage _{PLL_SEL, CLK_SEL}
CLK0
-0.3
I_IN
V_PP
V_CMR
Input Current
Peak-to-Peak
Input Voltage
Common Mode
Input Voltage;
NOTE 1, 2
CLK1, nCLK1
CLK1, nCLK1
0.15
GND + 0.5
V_OH
Output High Voltage
I_OH = -40mA
2.4
V_OL
Output Low Voltage
I_OL = 40mA
I_OL = 12mA
NOTE 1: Common mode voltage is defined as V_IH.
NOTE 2: For single ended applications, the maximum input voltage for CLK1 and nCLK1 is V_DDA+ 0.3V.
Maximum
V_DD + 0.3
0.8
1.3
±120
1.3
V_DD - 0.85
0.55
0.3
Units
V
V
V
µA
V
V
V
V
V
IDT^™ / ICS^™ DIFFERENTIAL-TO-LVCMOS ZERO DELAY BUFFER
5
ICS87951I-147 REV A JUNE 21, 2006