92HD91 Datasheet, PDF (79/298 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM

92HD91
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Field Name
InvertValid
InvertData
ADCClkDelay
DACClkDelay
Bits
R/W
Default
Reset
3
RW
0h
POR
ADC Valid Invert: 1 = 14.112MHz valid strobe is inverted, 0 = 14.112MHz valid
strobe is not inverted.
2
RW
0h
POR
ADC Data Invert: 1 = 1-bit inputs are inverted, 0 = 1-bit inputs are not inverted.
1
RW
0h
POR
Delay ADC clock.
0
RW
0h
POR
Delay DAC clock.
7.4.23. AFG (NID = 01h): PortUse
Reg Byte 4 (Bits 31:24) Byte 3 (Bits 23:16) Byte 2 (Bits 15:8)
Set
Get
FC000h
Byte 1 (Bits 7:0)
7C0h
Field Name
Rsvd
Mono
PortF
PortE
PortD
Bits
R/W
Default
Reset
31:7
R
0000000h
N/A (Hard-coded)
Reserved.
6
RW
1h
POR
1=power down port if not input or output enabled, 0=do not force power down
based on input or output enable
5
RW
1h
POR
1=power down port if not input or output enabled, 0=do not force power down
based on input or output enable
4
RW
1h
POR
1=power down port if not input or output enabled, 0=do not force power down
based on input or output enable
3
RW
1h
POR
1=power down port if not input or output enabled, 0=do not force power down
based on input or output enable.
IDT CONFIDENTIAL
79
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
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92HD91