92HD91 Datasheet, PDF (290/298 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM

92HD91
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Register Address
Bit
Label
EQRAM_WRITE[31:24]
verb FA8/7A8
7:0
EQWD[31:24]
Type Default
Description
RW 0x00
48-bit data register, contains the values to be written to the
EQRAM. The address written will have be specified by the
EQRAM Address fields.
Register Address
Bit
Label
EQRAM_WRITE[23:16]
verb FA9/7A9
7:0
EQWD[23:16]
Type Default
Description
RW 0x00
48-bit data register, contains the values to be written to the
EQRAM. The address written will have be specified by the
EQRAM Address fields.
Register Address
EQRAM_WRITE[15:8]
verb FAA/7AA
Bit
Label
7:0 EQWD[15:8]
Type Default
Description
RW 0x00
48-bit data register, contains the values to be written to the
EQRAM. The address written will have be specified by the
EQRAM Address fields.
Register Address
EQRAM_WRITE[7:0]
verb FAB/7AB
Bit
Label
7:0 EQWD[7:0]
Type Default
Description
RW 0x00
48-bit data register, contains the values to be written to the
EQRAM. The address written will have be specified by the
EQRAM Address fields.
7.29.1.26. EQRAM Address Register
This 8-bit register provides the address to the internal RAM when doing indirect writes/reads to the
EQRAM.
Prior to WC revision, this register reset by POR/DAFG/ULR. WC revision, reset by POR only. Writing
to NID22h verb 77F will generate a reset for all revisions.
Register Address
verb FAC/7AC
Bit
Label
7:6 RSVD
5:0 EQADD[5:0]
Type Default
Description
RO 0x00 Reserved
RW 0x00
Contains the address (between 0x00 and 0x33) of the
EQRAM to be accessed by a read or write. This is not a byte
address--it is the address of the 48-bit data item to be
accessed from the EQRAM.
7.29.1.27. EQRAM Control Register
This control register provides the write/read enable when doing indirect writes/reads to the EQRAM
Prior to WC revision, this register reset by POR/DAFG/ULR. WC revision, reset by POR only. Writing
to NID22h verb 77F will generate a reset for all revisions.
Register Address
verb FAD/7AD
Bit
Label
7
EQRAM_wr
6
EQRAM_rd
5:0 RSVD
Type Default
Description
RW 0
1 = write to EQRAM, cleared by HW when done
RW 0
1 = read from EQRAM, cleared by HW when done
RO 0
Reserved
IDT CONFIDENTIAL
290
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92HD91