92HD66B Datasheet, PDF (65/286 Pages) Integrated Device Technology – FOUR CHANNEL HD AUDIO CODECS

92HD66B
FOUR CHANNEL HD AUDIO CODECS WITH DUAL CAPLESS HEADPHONE AMPLIFIERS
Field Name
Control2
Control1
Control0
Bits
R/W
Default
Reset
2
RW
0h
POR - DAFG - ULR
Direction control for GPIO2: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output
1
RW
0h
POR - DAFG - ULR
Direction control for GPIO1: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output
0
RW
0h
POR - DAFG - ULR
Direction control for GPIO0: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output
6.7.14. AFG (NID = 01h): GPIOWakeEn
Reg Byte 4 (Bits 31:24) Byte 3 (Bits 23:16) Byte 2 (Bits 15:8)
Set
Get
F1800h
Byte 1 (Bits 7:0)
718h
Field Name
Rsvd
W4
W3
W2
Bits
R/W
Default
Reset
31:5
R
00000000h
N/A (Hard-coded)
Reserved.
4
RW
0h
POR - DAFG - ULR
Wake enable for GPIO4: 0 = wake-up event is disabled; 1 = When HD Audio
link is powered down (RST# is asserted), a wake-up event will trigger a Status
Change Request event on the link. (Available only on 48-pin versions)
3
RW
0h
POR - DAFG - ULR
Wake enable for GPIO3: 0 = wake-up event is disabled; 1 = When HD Audio
link is powered down (RST# is asserted), a wake-up event will trigger a Status
Change Request event on the link.
2
RW
0h
POR - DAFG - ULR
Wake enable for GPIO2: 0 = wake-up event is disabled; 1 = When HD Audio
link is powered down (RST# is asserted), a wake-up event will trigger a Status
Change Request event on the link.
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92HD66B