ICS843002I-41 Datasheet, PDF (6/23 Pages) Integrated Circuit Systems – 700MHz, FEMTOCLOCKS-TM VCXO BASED SONET/SDH JITTER ATTENUATOR

ICS843002I-41
700MHZ, FEMTOCLOCKS™ VCXO BASED SONET/SDH JITTER ATTENUATOR
Table 4B. LVCMOS/LVTTL DC Characteristics, V_CC = 3.3V±5%, V_{CCO_LVCMOS} = 3.3V±5% or 2.5V±5%, V_EE = 0V,
T_A = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
V_IH
Input High Voltage
2
V_IL
Input Low Voltage
-0.3
QA_SEL[0:1],
QB_SEL[0:1]
V_CC = V_IN = 3.465V
I_IH
Input
High Current
CLK_SEL,
QA_SEL2,
QB_SEL2,
R_SEL[0:2]
V_CC = V_IN = 3.465V
V_CC + 0.3
V
0.8
V
5
µA
150
µA
QA_SEL[0:1],
QB_SEL[0:1]
V_CC = 3.465V, V_IN = 0V
-150
µA
I_IL
Input
Low Current
CLK_SEL,
QA_SEL2,
QB_SEL2,
V_CC = 3.465V, V_IN = 0V
-5
µA
R_SEL[0:2]
V_OH
Output
High Voltage
V_OL
Output
Low Voltage
LOR0, LOR1
V_{CCO_LVCMOS} = 3.465V
2.6
NOTE 1
V_{CCO_LVCMOS} = 2.625V
1.8
LOR0, LOR1
NOTE 1
V_{CCO_LVCMOS} = 3.465V or
2.625V
V
V
0.5
V
NOTE 1: Outputs terminated with 50Ω to V_{CCO_LVCMOS}/2.See Parameter Measurement Information Section, “Output Load Test Circuit”.
Table 4C. Differential DC Characteristics, V_CC = 3.3V±5%, V_{CCO_LVPECL} = 3.3V±5% or 2.5V±5%, V_EE = 0V,
T_A = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
CLK0/nCLK0,
I_IH
Input High Current
CLK1/nCLK1
V_CC = V_IN = 3.465V
150
I_IL
V_PP
V_CMR
Input Low Current
CLK0, CLK1
nCLK0, nCLK1
Peak-to-Peak Voltage; NOTE 1
Common Mode Input Voltage; NOTE 1, 2
V_CC = 3.465V, V_IN = 0V
V_CC = 3.465V, V_IN = 0V
-5
-150
0.15
V_EE + 0.5
1.3
V_CC – 0.85
NOTE 1: V_IL cannot be less than -0.3V
NOTE 2: Common mode input voltage is defined as V_IH.
Units
µA
µA
µA
V
V
IDT™ / ICS™ VCXO BASED SONET/SDH JITTER ATTENUATOR
6
ICS843002AKI-41 REV. A OCTOBER 25, 2007