ICS843002I-41 Datasheet, PDF (3/23 Pages) Integrated Circuit Systems – 700MHz, FEMTOCLOCKS-TM VCXO BASED SONET/SDH JITTER ATTENUATOR

ICS843002I-41
700MHZ, FEMTOCLOCKS™ VCXO BASED SONET/SDH JITTER ATTENUATOR
Table 1. Pin Descriptions
Number
1, 2
3
4
5
6
7
8
9,
10
11
12,
13
14
15, 16
17, 27
18, 19
20
21
22
23
24
25
26
28,
29,
30
31,
32
Name
LF1, LF0
ISET
V_CC
CLK0
nCLK0
CLK_SEL
QA_SEL2
QA_SEL1,
QA_SEL0
QB_SEL2
QB_SEL1,
QB_SEL0
V_CCA
QA, nQA
V_EE
QB, nQB
V_{CCO_LVPECL}
V_{CCO_LVCMOS}
nc
LOR1
LOR0
nCLK1
CLK1
R_SEL0,
R_SEL1,
R_SEL2
XTAL_OUT,
XTAL_IN
Type
Analog
Input/Output
Analog
Input/Output
Power
Input
Pulldown
Input
Pullup
Pulldown
Input
Pulldown
Input
Pulldown
Input
Pullup
Input
Pulldown
Input
Power
Output
Power
Output
Power
Power
Unused
Output
Pullup
Output
Input
Input
Pullup
Pulldown
Pulldown
Description
Loop filter connection node pins.
Charge pump current setting pin.
Core power supply pin.
Non-inverting differential clock input.
Inverting differential clock input. V_CC/2 bias voltage when left floating.
Input clock select. LVCMOS/LVTTL interface levels. See Table 3A.
Output divider control for QA/nQA LVPECL outputs.
LVCMOS/LVTTL interface levels.See Table 3C.
Output divider control for QA/nQA LVPECL outputs.
LVCMOS/LVTTL interface levels.See Table 3C.
Output divider control for QB/nQB LVPECL outputs.
LVCMOS/LVTTL interface levels.See Table 3C.
Output divider control for QB/nQB LVPECL outputs.
LVCMOS/LVTTL interface levels.See Table 3C.
Analog supply pin.
Differential clock output pair. LVPECL interface levels.
Negative supply pins.
Differential clock output pair. LVPECL interface levels.
Output supply pin for LVPECL outputs.
Output supply pin for LVCMOS/LVTTL outputs.
No connect.
Alarm output, loss of reference for CLK1/nCLK1.
LVCMOS/LVTTL interface levels.
Alarm output, loss of reference for CLK0/nCLK0.
LVCMOS/LVTTL interface levels.
Inverting differential clock input. V_CC/2 bias voltage when left floating.
Non-inverting differential clock input.
Input
Pulldown Input divider selection. LVCMOS/LVTTL interface levels. See Table 3B.
Input
Crystal oscillator interface. The XTAL_IN is the input.
XTAL_OUT is the output.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
IDT™ / ICS™ VCXO BASED SONET/SDH JITTER ATTENUATOR
3
ICS843002AKI-41 REV. A OCTOBER 25, 2007