ICS843002I-41 Datasheet, PDF (17/23 Pages) Integrated Circuit Systems – 700MHz, FEMTOCLOCKS-TM VCXO BASED SONET/SDH JITTER ATTENUATOR

ICS843002I-41
700MHZ, FEMTOCLOCKS™ VCXO BASED SONET/SDH JITTER ATTENUATOR
VCXO-PLL EXTERNAL COMPONENTS
Choosing the correct external components and having a proper
printed circuit board (PCB) layout is a key task for quality operation
of the VCXO-PLL. In choosing a crystal, special precaution must
be taken with the package and load capacitance (C_L). In addition,
frequency, accuracy and temperature range must also be
considered. Since the pulling range of a crystal also varies with
the package, it is recommended that a metal-canned package like
HC49 be used. Generally, a metal-canned package has a larger
pulling range than a surface mounted device (SMD). For crystal
selection information, refer to the VCXO Crystal Selection
Application Note.
The crystal’s load capacitance C_L characteristic determines it
resonating frequency and is closely related to the VCXO tuning
range. The total external capacitance seen by the crystal when
installed on a board is the sum of the stray board capacitance, IC
package lead capacitance, internal varactor capacitance and any
installed tuning capacitors (C_TUNE).
If the crystal C_L is greater than the total external capacitance, the
VCXO will oscillate at a higher frequency than the crystal
specification. If the crystal (C_L) is lower than the total external
capacitance, the VCXO will oscillate at a lower frequency than the
crystal specification. In either case, the absolute tuning range is
VCXO Characteristics Table
Symbol Parameter
Typical
Units
k_VCXO
C_{V_LOW}
C_{V_HIGH}
VCXO Gain
Low Varactor Capacitance
High Varactor Capacitance
5800
12.6
24.5
Hz/V
pF
pF
VCXO-PLL Loop Bandwidth Selection Table
Bandwidth
Crystal Frequency (MHz)
10Hz (Low)
19.44
R_S (kΩ)
5
70Hz (Mid)
19.44
10
100Hz (High)
19.44
15
reduced. The correct value of C_L is dependant on the
characteristics of the VCXO. The recommended C_L in the Crystal
Parameter Table balances the tuning range by centering the
tuning curve.
The VCXO-PLL Loop Bandwidth Selection Table shows R_S, C_S
and C_P values for recommended high, mid and low loop bandwidth
configurations. The device has been characterized using these
parameters. For other configurations, refer to the Loop Filter
Component Selection for VCXO Based PLLs Application Note.
The crystal and external loop
filter components should be
kept as close as possible to the
device. Loop filter and crystal
traces should be kept short and
separated from each other.
Other signal traces should be
kept separate and not run
underneath the device, loop
filter or crystal components.
LF0
LF1
ISET
R_S R_SET
C_P C_S
C_TUNE
19.44MHz
C_TUNE
XTAL_IN
XTAL_OUT
C_S (µF)
1.0
1.0
1.0
C_P (µF)
0.10
0.01
0.01
R_SET (kΩ)
9.5
4.75
4.75
Crystal Characteristics
Symbol Parameter
Mode of Oscillation
f_N
Frequency
f_T
Frequency Tolerance
f_S
Frequency Stability
Operating Temperature Range
C_L
C_O
C_O / C₁
ESR
Load Capacitance
Shunt Capacitance
Pullability Ratio
Equivalent Series Resistance
Drive Level
Aging @ 25 ⁰C
Test Conditions
Minimum Typical Maximum
Fundamental
19.44
±20
±20
-40
+85
12
4
220
240
50
1
±3 per year
Units
MHz
ppm
ppm
0_C
pF
pF
Ω
mW
ppm
IDT™ / ICS™ VCXO BASED SONET/SDH JITTER ATTENUATOR
17
ICS843002AKI-41 REV. A OCTOBER 25, 2007