932SQ426_16 Datasheet, PDF (6/25 Pages) Integrated Device Technology – DERIVATIVE SUPPORTING SRNS PCIE CLOCKING

932SQ426
CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING
Pin Descriptions (VFQFPN)
PIN #
PIN NAME
1 GNDPCI
2 VDDPCI
3 PCI4_2x
4 PCI3_2x
5 PCI2_2x
6 PCI1_2x
7 PCI0_2x
8 GNDPCI
9 VDDPCI
10 VDD48
11 48M_2x
12 GND48
13 GND96
14 DOT96T
15 DOT96C
16 AVDD96
17 TEST_MODE
18 CKPWRGD#/PD
19 VDDSRC
20 SRC0T
21 SRC0C
22 GNDSRC
23 SRC1C
24 SRC1T
25 SRC2C
26 SRC2T
27 VDDSRC
28 AVDD_SRC
29 GNDSRC
30 IREF
31 NS_SRC0C
32 NS_SRC0T
TYPE
DESCRIPTION
932S _{Ground pin for PCI outputs and logic.}
Q426
PWR
OUT 3.3V PCI clock output
OUT 3.3V PCI clock output
OUT 3.3V PCI clock output
OUT 3.3V PCI clock output
OUT 3.3V PCI clock output
PWR Ground pin for PCI outputs and logic.
PWR 3.3V power for the PCI outputs and logic
PWR 3.3V power for the 48MHz output and logic
OUT 3.3V 48MHz output
PWR Ground pin for 48MHz output and logic.
PWR Ground pin for DOT96 output and logic.
True clock of differential 96MHz output. These are current mode outputs and external series resistors and
OUT shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific
values.
Complementary clock of differential 96MHz output. These are current mode outputs and external series
OUT resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations
for specific values.
PWR 3.3V power for the 48/96MHz PLL and the 96MHz output and logic
IN ^{TEST_MODE is a real time input to select between Hi-Z and REF/N divider mode while in test mode. Refer}
to Test Clarification Table.
CKPWRGD# is an active low input used to sample latched inputs and allow the device to Power Up. PD is
IN an asynchronous active high input pin used to put the device into a low power state. The internal clocks
and PLLs are stopped.
PWR 3.3V power for the SRC outputs and logic
True clock of differential SRC output. These are current mode outputs and external series resistors and
OUT shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific
values.
Complementary clock of differential SRC output. These are current mode outputs and external series
OUT resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations
for specific values.
PWR Ground pin for SRC outputs and logic.
Complementary clock of differential SRC output. These are current mode outputs and external series
OUT resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations
for specific values.
True clock of differential SRC output. These are current mode outputs and external series resistors and
OUT shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific
values.
Complementary clock of differential SRC output. These are current mode outputs and external series
OUT resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations
for specific values.
True clock of differential SRC output. These are current mode outputs and external series resistors and
OUT shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific
values.
PWR 3.3V power for the SRC outputs and logic
PWR 3.3V power for the SRC PLL analog circuits
PWR Ground pin for SRC outputs and logic.
This pin establishes the reference current for the differential current-mode output pairs. This pin requires a
OUT fixed precision resistor tied to ground in order to establish the appropriate current. 475 ohms is the
standard value.
Complementary clock of differential non-spreading SRC output. These are current mode outputs and
OUT external series resistors and shunt resistors are required for termination. See Test Loads and
Recommended Terminations for specific values.
True clock of differential non-spreading SRC output. These are current mode outputs and external series
OUT resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations
for specific values.
IDT® CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING
6
932SQ426
REV C 022916