932SQ426_16 Datasheet, PDF (2/25 Pages) Integrated Device Technology – DERIVATIVE SUPPORTING SRNS PCIE CLOCKING

932SQ426
CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING
Pin Configuration (TSSOP)
SMBCLK 1
64 SMBDAT
GND14 2
63 VDDCPU
AVDD14 3
62 CPU3T
VDD14 4
v_{REF14_3x/TEST_SEL 5}
61 CPU3C
60 CPU2T
GND14 6
59 CPU2C
GNDXTAL 7
58 GNDCPU
X1_25 8
57 VDDCPU
X2_25 9
56 CPU1T
VDDXTAL 10
55 CPU1C
GN DPCI 11
54 CPU0T
VD DPCI 12
53 CPU0C
PCI4_2x 13
52 GNDNS
PCI3_2x 14
51 AVDD_NS_SAS
PCI2_2x 15
50 NS_SAS1T
PCI1_2x 16
49 NS_SAS1C
PCI0_2x 17
48 NS_SAS0T
GN DPCI 18
47 NS_SAS0C
VD DPCI 19
46 GNDNS
VDD48 20
45 VDDNS
48M_2x 21
44 NS_SRC1T
GND48 22
43 NS_SRC1C
GND96 23
42 NS_SRC0T
DOT96T 24
41 NS_SRC0C
DOT96C 25
40 IREF
AVDD96 26
39 GNDSRC
TEST_MODE 27
38 AVDD_SRC
CKPWR GD#/PD 28
37 VDDSRC
VD DSRC 29
36 SRC2T
SRC0T 30
35 SRC2C
SRC0C 31
34 SRC1T
GN DSRC 32
33 SRC1C
64-TSSOP
Note: Pins with ^ prefix have internal 120K pullup
Pins with v prefix have internal 120K pulldown
932SQ426 Functionality
CPU, SRC,
NS_SAS,
NS _SR C
100
PCI
33.3 3
REF
14.3 18
DOT96
9 6.00
USB
48.00 MHz
Power Group Pin Numbers
QFN
TSSOP
Description
VDD GND VDD GND
57 56
3
2 14MHz PLL Analog
58
60
4
6 REF14M Output and Logic
64 61 10
7 25MHz XTAL
2,9 1,8 12, 19 11,18 PCI Outputs and Logic
10 12 20
22 48MHz Output and Logic
16 13 26
23 96MHz PLL Analog, Output and Logic
19,27,28 22 29,37,38 32,39 SRC Outputs and Logic
35 36 45
46 Non-Spreading Differential Outputs & Logic
41 42 51
52 NS-SAS/SRC PLL Analog
47,53 48 57,63 58 CPU Outputs and Logic
932SQ426 Power Down Functionality
CKP WRG D#/ PD
1
0
D ifferential
Outputs
S ingl e-
ende d
Outputs
HI-Z¹
Low
Running
Single
ended
Outputs
w/La tc h
Lo w²
1. Hi-Z on the differential outputs w ill result in both True
and Complement being low due to the termination
2. These outputs are Hi-Z after VDD is applied and before
the first assertion of CKPWR GD#.
IDT® CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING
2
932SQ426
REV C 022916