ICS9LPRS480 Datasheet, PDF (5/25 Pages) Integrated Device Technology – Programmable System Clock Chip for ATI RS780 - K8TM based Systems

Integrated
Circuit
Systems, Inc.
ICS9LPRS480
TSSOP Pin Description
PIN #
PIN NAME
1 REF1/SEL_SATA
2 REF0/SEL_HTT66
3 GNDREF
4 X1
5 X2
6 VDD48
7 48MHz_0
8 GND48
9 SMBCLK
10 SMBDAT
11 VDD27
12 SRC7C_LPRS/27MHz_NS
13 SRC7T_LPRS/27MHz_SS
14 GND27
15 SRC4C_LPRS
16 SRC4T_LPRS
17 GNDSRC
18 VDDSRC_IO
19 SRC3C_LPRS
20 SRC3T_LPRS
21 SRC2C_LPRS
22 SRC2T_LPRS
23 VDDSRC
24 VDDSRC_IO
25 GNDSRC
26 SRC1C_LPRS
27 SRC1T_LPRS
28 SRC0C_LPRS
29 SRC0T_LPRS
30 *CLKREQ0#
31 GNDATIG
32 VDDATIG_IO
PIN TYPE
I/O
I/O
GND
IN
OUT
PWR
OUT
GND
IN
I/O
PWR
OUT
OUT
GND
OUT
OUT
GND
PWR
OUT
OUT
OUT
OUT
PWR
PWR
GND
OUT
OUT
OUT
OUT
IN
GND
PWR
DESCRIPTION
14.318 MHz 3.3V reference clock./ 3.3V tolerant latched input to select function of SRC6/SATA output
0 = 100MHz differential spreading SRC clock, 1 = 100MHz non-spreading differential SATA clock
14.318 MHz 3.3V reference clock./ 3.3V tolerant latched input to select Hyper Transport Clock
Frequency.
0 = 100MHz differential HTT clock, 1 = 66MHz 3.3V single ended HTT clock
Ground pin for the REF outputs.
Crystal input, nominally 14.318MHz
Crystal output, nominally 14.318MHz
Power pin for the 48MHz outputs and core. 3.3V
48MHz clock output.
Ground pin for the 48MHz outputs
Clock pin of SMBus circuitry, 5V tolerant.
Data pin for SMBus circuitry, 5V tolerant.
3.3V Power supply for SRC/27MHz output and 27MHz SS PLL
True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm
series resistor needed)/27MHz 3.3V Single-ended non-spread output for discrete graphics
Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33
ohm series resistor needed)/27MHz 3.3V Single-ended spreading output for discrete graphics
Ground for the SRC/27MHz outputs
Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33
ohm series resistor needed)
True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm
series resistor needed)
Ground pin for the SRC outputs
Power supply for differential SRC outputs, nominal 1.05V to 3.3V
Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33
ohm series resistor needed)
True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm
series resistor needed)
Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33
ohm series resistor needed)
True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm
series resistor needed)
Supply for SRC core, 3.3V nominal
Power supply for differential SRC outputs, nominal 1.05V to 3.3V
Ground pin for the SRC outputs
Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33
ohm series resistor needed)
True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm
series resistor needed)
Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33
ohm series resistor needed)
True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm
series resistor needed)
Clock Request pin for SRC0 outputs. If output is selected for control, then that output is controlled as
follows:
0 = enabled, 1 = Low-Low
Ground pin for the ATIG outputs
Power supply for differential ATIG outputs, nominal 1.05V to 3.3V
1391D—02/02/09
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