ICS9LPRS480 Datasheet, PDF (3/25 Pages) Integrated Device Technology – Programmable System Clock Chip for ATI RS780 - K8TM based Systems

Integrated
Circuit
Systems, Inc.
ICS9LPRS480
MLF Pin Description (Continued)
PIN #
PIN NAME
33 GNDSB_SRC
34 VDDSB_SRC_IO
35 VDDSB_SRC
36 SB_SRC0C_LPRS
37 SB_SRC0T_LPRS
38 CLKREQ4#*
39 CLKREQ3#*
40 VDDSATA
41 SRC6C/SATAC_LPRS
42 SRC6T/SATAT_LPRS
43 GNDSATA
44 CLKREQ2#*
45 CLKREQ1#*
46 GNDCPU
47 VDDCPU_IO
48 VDDCPU
49 CPUKG0C_LPRS
50 CPUKG0T_LPRS
51 PD#
52 GNDHTT
53 HTT0C_LPRS/66M
54 HTT0T_LPRS/66M
55 VDDHTT
56 VDDREF
PIN TYPE
GND
PWR
PWR
OUT
OUT
IN
IN
PWR
OUT
OUT
GND
IN
IN
GND
PWR
PWR
OUT
OUT
IN
PWR
OUT
OUT
PWR
PWR
DESCRIPTION
Ground pin for the SB_SRC outputs
Power supply for differential SB_SRC outputs, nominal 1.05V to 3.3V
Supply for SB SRC PLL core, 3.3V nominal
Complement clock of low power differential Chipset-to-Chipset SRC clock pair. (no 50ohm shunt
resistor to GND and no 33 ohm series resistor needed
True clock of low power differential Chipset-to-Chipset SRC clock pair. (no 50ohm shunt resistor
to GND and no 33 ohm series resistor needed
Clock Request pin for SRC4 outputs. If output is selected for control, then that output is controlled
as follows:
0 = enabled, 1 = Low-Low
Clock Request pin for SRC3 outputs. If output is selected for control, then that output is controlled
as follows:
0 = enabled, 1 = Low-Low
Power supply for SATA core logic, nominal 3.3V
Complement clock of low power differential SRC/SATA clock pair. (no 50ohm shunt resistor to
GND and no 33 ohm series resistor needed)
True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33
ohm series resistor needed)
Ground pin for the SRC outputs
Clock Request pin for SRC2 outputs. If output is selected for control, then that output is controlled
as follows:
0 = enabled, 1 = Low-Low
Clock Request pin for SRC1 outputs. If output is selected for control, then that output is controlled
as follows:
0 = enabled, 1 = Low-Low
Ground pin for the CPU outputs
Power supply for differential CPU outputs, nominal 1.05V to 3.3V
Supply for CPU core, 3.3V nominal
Complementary signal of low-power differential push-pull AMD K8 "Greyhound" clock with
integrated series resistor. (no 33 ohm series resistor needed)
True signal of low-power differential push-pull AMD K8 "Greyhound" clock with integrated series
resistor.(no 33 ohm series resistor needed)
Enter /Exit Power Down.
0 = Power Down, 1 = normal operation.
Ground pin for the HTT outputs
Complementary signal of low-power differential push-pull hypertransport clock with integrated
series resistor. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) / 1.8V
single ended 66MHz hyper transport clock
True signal of low-power differential push-pull hypertransport clock with integrated series
resistor. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) /1.8V single
ended 66MHz hyper transport clock
Supply for HTT clocks, nominal 3.3V.
Ref, XTAL power supply, nominal 3.3V
57 REF2/SEL_27
14.318 MHz reference clock, 3.3V/3.3V Latched input to select 27MHz SS and non SS on SRC7
I/O 0 = 100MHz differential spreading SRC clock, 1 = 27MHz non-spreading singled clock on pin 5
and 27MHz spread clock on pin 6.
58 REF1/SEL_SATA
59 REF0/SEL_HTT66
60 GNDREF
61 X1
62 X2
63 VDD48
64 48MHz_0
1391D—02/02/09
I/O
I/O
GND
IN
OUT
PWR
OUT
14.318 MHz 3.3V reference clock./ 3.3V tolerant latched input to select function of SRC6/SATA
output
0 = 100MHz differential spreading SRC clock, 1 = 100MHz non-spreading differential SATA clock
14.318 MHz 3.3V reference clock./ 3.3V tolerant latched input to select Hyper Transport Clock
Frequency.
0 = 100MHz differential HTT clock, 1 = 66MHz 3.3V single ended HTT clock
Ground pin for the REF outputs.
Crystal input, nominally 14.318MHz
Crystal output, nominally 14.318MHz
Power pin for the 48MHz outputs and core. 3.3V
48MHz clock output.
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