ICS9LPRS480 Datasheet, PDF (18/25 Pages) Integrated Device Technology – Programmable System Clock Chip for ATI RS780 - K8TM based Systems

Integrated
Circuit
Systems, Inc.
ICS9LPRS480
Byte
4
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SMBus Table: SB_SRC Frequency Control Register
Name
Control Function Type
S3
RW
S2
27_SSC
RW
S1
Spread Select
RW
S0
RW
SB_SRC_FS3
SB_SRC_FS2
SB_SRC_FS1
SB_SRC_FS0
SB_SRC Frequency Select RW
SB_SRC Frequency Select RW
SB_SRC Frequency Select RW
SB_SRC Freq. Select LSB RW
0
1
S[1:0]: 00 = -0.5% Default,
01 =1.0%, 10 = -1.5%, 11 = -2%.
See Table 3: 27Mhz_Spread, LCDCLK Spread
and Frequency Selection Table for additional
selections.
See SB_SRC Frequency Select Table.
Default
0
0
0
0
1
1
1
1
Byte
5
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SMBus Table: 27MHz Slew Rate Control Register
Name
Control Function Type
0
1
27M_SS_Slew Rate
27M_NS_Slew Rate
Slew Rate Control
Slew Rate Control
These bits program the slew rate of the single
RW
ended outputs. The maximum slew rate is
1.9V/ns and the minimum slew rate is 1.1V/ns.
The slew rate selection is as follows:
11 = 1.9V/ns
10 = 1.6V/ns
RW
01 = 1.1V/ns
00 = tristated
SB_SRC Source
SB_SRC Source Selection RW
Reserved
Reserved
Reserved
SB_SRC PLL
SRC PLL
Default
1
1
1
1
1
0
0
0
Byte
6
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SMBus Table: I/O Vout Control Register
Name
Control Function Type
SRC Diff AMP
SRC Diff AMP
SRC Differential output RW
Amplitude Control
RW
CPU Diff AMP
CPU Diff AMP
CPU Differential output RW
Amplitude Control
RW
SB_SRC Diff AMP
SB_SRC Diff AMP
SB_SRC Differential output RW
Amplitude Control
RW
Reserved
Reserved
0
00 = 700mV
10 = 900mV
00 = 700mV
10 = 900mV
00 = 700mV
10 = 900mV
1
01 = 800mV
11 = 1000mV
01 = 800mV
11 = 1000mV
01 = 800mV
11 = 1000mV
Default
0
1
0
1
0
1
X
X
SMBus Table: Vendor & Revision ID Register
Byte 7
Name
Control Function Type
0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
RID3
RID2
RID1
RID0
VID3
VID2
VID1
R
-
REVISION ID
R
-
R
-
R
-
R
-
VENDOR ID
R
-
R
-
Bit 0
VID0
R
-
1
Default
-
0
-
0
-
0
-
1
-
0
-
0
-
0
-
1
1391D—02/02/09
18