810001-22_17 Datasheet, PDF (3/19 Pages) Integrated Device Technology – FemtoClock™ Dual VCXO Video PLL

810001-22 DATA SHEET
Table 1. Pin Descriptions
Number
Name
Type
Description
1, 2
LF1, LF0
Analog
Input/Output
Loop filter connection node pins.
3
ISET
Analog
Input/Output
Charge pump current setting pin.
4, 11, 25
5, 22
V_DD
nBP0,
nBP1
Power
Input
Pullup
Core supply pins.
PLL Bypass control pins. See block diagram.
6, 20, 29
GND
Power
Power supply ground.
7
CLK_SEL
Input
Pulldown
Input clock select. When HIGH selects CLK1. When LOW, selects CLK0.
LVCMOS / LVTTL interface levels.
8, 9
CLK1, CLK0
Input
Pulldown Single-ended clock inputs. LVCMOS/LVTTL interface levels.
10, 14,
15, 16
V0, V1,
V2, V3
Input
Pulldown VCXO PLL divider selection pins. LVCMOS/LVTTL interface levels.
Active HIGH Master Reset. When logic HIGH, the internal dividers are reset
12
MR
Input
Pulldown causing the output to go low. When logic LOW, the internal dividers and the
output is enabled. LVCMOS/LVTTL interface levels.
13
MF
Input
Pulldown FemtoClock multiplication factor select pin. LVCMOS/LVTTL interface levels.
17
V_DDA
Power
18
V_DDO
Power
19
Q
Output
Analog supply pin.
Output supply pin.
Single-ended VCXO PLL clock output. LVCMOS/LVTTL interface levels.
21
OE
Input
Pullup
Output enable. When logic LOW, the clock output is in high-impedance. When
logic HIGH, the output is enabled. LVCMOS/LVTTL interface levels.
23, 24
N1, N0
Input
Pulldown FemtoClock output divide select pins. LVCMOS/LVTTL interface levels.
26
XTAL_SEL
Input
Pulldown
Crystal select. When HIGH, selects XTAL1. When LOW, selects XTAL0.
LVCMOS/LVTTL interface levels.
27,
XTAL_OUT1,
28
XTAL_IN1
Input
Crystal oscillator interface. XTAL_IN1 is the input. XTAL_OUT1 is the output.
30,
XTAL_OUT0,
31
XTAL_IN0
Input
Crystal oscillator interface. XTAL_IN0 is the input. XTAL_OUT0 is the output.
32
V_DDX
Power
Power supply pin for VCXO charge pump.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
C_IN
C_PD
R_PULLUP
R_PULLDOWN
R_OUT
Parameter
Input Capacitance
Power Dissipation Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Output Impedance
Test Conditions
V_DD = V_DDO = 3.465V
Minimum
Typical
4
8.5
51
51
22.5
Maximum
Units
pF
pF
k
k

Rev A 8/14/15
3
FEMTOCLOCK™ DUAL VCXO VIDEO PLL