810001-22_17 Datasheet, PDF (1/19 Pages) Integrated Device Technology – FemtoClock™ Dual VCXO Video PLL

FemtoClock™ Dual VCXO Video PLL
810001-22
DATA SHEET
General Description
The 810001-22 is a PLL based synchronous clock generator that is
optimized for digital video clock jitter attenuation and frequency
translation. The device contains two internal frequency multiplication
stages that are cascaded in series. The first stage is a VCXO PLL
that is optimized to provide reference clock jitter attenuation, and to
support the complex PLL multiplication ratios needed for video rate
conversion.
The second stage is a FemtoClock™ frequency multiplier that
provides the low jitter, high frequency video output clock.
Preset multiplication ratios are selected from internal lookup tables
using device input selection pins. The multiplication ratios are
optimized to support common video rates used in professional video
system applications. The VCXO requires the use of an external,
inexpensive pullable crystal. Two crystal connections are provided
(pin selectable) so that both 60 and 59.94Hz base frame rates can
be supported. The VCXO requires external passive loop filter
components which are used to set the PLL loop bandwidth and
damping characteristics.
Supported Input Frequencies
f_VCXO = 27MHz
67.5kHz
f_VCXO = 26.973MHz
67.4326
56.25kHz
56.1938
45.0kHz
44.955
37.5kHz
37.4625
33.75kHz
33.7163
31.4685kHz
31.4371
31.25kHz
31.2188
28.125kHz
28.0969
27.0kHz
26.973
22.5kHz
22.4775
18.75kHz
18.7313
18kHz
17.982
15.7343kHz
15.7185
15.625kHz
15.6094
Features
• Jitter attenuation and frequency translation of video clock signals
• Supports SMTPE 292M, ITU-R Rec. 601/656 and
MPEG-transport clocks
• Support of High-Definition (HD) and Standard-Definition (SD) pixel
rates
• Dual VCXO-PLL supports both 60 and 59.94Hz base frame rates
in one device
• Dual PLL mode for high-frequency clock generation (32.967MHz
to 162MHz)
• VCXO-PLL mode for low-frequency clock generation (27MHz and
26.973MHz)
• One LVCMOS/LVTTL PLL clock output
• Two selectable LVCMOS/LVTTL input clocks
• LVCMOS/LVTTL compatible control signals
• RMS phase jitter @148.5MHz, using a 27MHz crystal
(12kHz – 20MHz): 1.01ps (typical)
• 3.3V supply voltage
• 0°C to 70°C ambient operating temperature
• Available in a lead-free (RoHS 6) 32-VFQFN package
• Use replacement part: 8T49N241-dddNLGI
Supported Output Frequencies
f_VCXO = 27MHz
148.5
f_VCXO = 26.973MHz
148.3516
74.25
74.1758
49.5
49.4505
33
32.967
162
161.8382
81
80.9191
54
53.9461
36
35.9640
27
26.973
810001-22 Rev A 8/14/15
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