92HD81 Datasheet, PDF (277/279 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM

92HD81
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
11. DOCUMENT REVISION HISTORY
Revision
0.5
0.9
0.91
0.92
0.93
0.94
0.95
0.96
0.97
0.98
Date
Description of Change
January 25, 2008 Initial release
May 9, 2008
Added widget details.Integrated addendum sections into datasheet.
May 27, 2008
Removed low voltage part number, as not needed as the DVD_IO pin dynamically selects low
voltage (1.5V) or normal (3.3V) HDA bus signaling based on what voltage is on the pin
YA revision and beyond updates
• BTL amp gain settings added to Section 2.18, “BTL Amplifier”
• Corrected tables in Section 2.17, “EAPD”
• Widget Changes in AFG (NID = 01h)
• AFGEAPD changed to have separate control bits for BTL, HP-A and HP-B
August 6, 2008
• AFGAnaPort Verb changed to remove the GSMark control, and to provide Ports A and B
with one power down control each, as opposed to each having a HP power down and a lin-
eout power down
• AFGAnaBeep Verb changed to add more flexible modes of operation
• AFGAnaBTL Verb changed to add MaxVol field and remove +6db control. Other fields
shifted a bit to maintain logical grouping
AFGAnaCapless Verb changed for new charge pump clock controls, as well as new test bits
required by the analog
October 2, 2008
Corrected Mic Boost Voltages in Section 3.2
Updated to include Aux mode Section 2.22, “Aux Audio Support (92HD81B1X only)”, widget controls
added at Chapter 7.4.32, “AFG (NID = 01h): AuxAudio”
corrected part number mappings Section 1.2, “Orderable Part Numbers”
corrected device ID mappings Section 7.3.1, “Root (NID = 00h): RevID”
October 27, 2008
Updated 3 widget default values for YB revision
Chapter 7.4.28, “AFG (NID = 01h): AnaBTL YC and YD Revisions” TS Wait BITs 11:8, default 6h to
0h
Chapter 7.4.30, “AFG (NID = 01h): AnaCapless” ChargePumpFreqBypass BIT 12 default 1h to 0h
Chapter 7.4.30, “AFG (NID = 01h): AnaCapless” ChargePumpSplyDetOverride BIT 13 default 1h to
0h
December 10, 2008 Corrected conflicting pin naming on pins 43 and 44.
January 9, 2009
Updated for the YC revision
Chapter 7.4.6, “AFG (NID = 01h): PwrStateCap” The LPD3Sup bit was renamed and default was
changed
Chapter 7.4.30, “AFG (NID = 01h): AnaCapless” ChargePumpFreqBypass BIT 12 default changed
Chapter 7.9.12, “PortE (NID = 0Eh): ConfigDefault” and Chapter 6.3, “Pin Configuration Default
Register Settings” Configuration default change
January 12,2009
Updated for the WA revision
Chapter 7.4.30, “AFG (NID = 01h): AnaCapless” ChargePumpFreqBypass BIT 12 default changed,
changed m3dB field name to “Reserved” and changed p6dB field name to “AntiPopBypass.”
March 5, 2009
Removed WA items.
Please note YD revision has no changes in documentation from YC. All YC notes apply to YD.
Removed 3.3V Analog option. Contact IDT for more information.
IDT CONFIDENTIAL
277
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
V 0.995 01/11
92HD81