92HD81 Datasheet, PDF (187/279 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM

92HD81
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Field Name
BitsPerSmpl
NmbrChan
Bits
R/W
Default
Reset
6:4
RW
3h
POR - DAFG - ULR
Bits per sample:
000b= 8 bits
001b= 16 bits
010b= 20 bits
011b= 24 bits
100b= 32 bits
101b-111b= Reserved
3:0
RW
1h
POR - DAFG - ULR
Total number of channels in the stream assigned to this converter:
0000b-1111b= 1-16 channels.
7.17.4. ADC0 (NID = 15h): ProcState
Reg Byte 4 (Bits 31:24) Byte 3 (Bits 23:16) Byte 2 (Bits 15:8)
Set
Get
F0300h
Byte 1 (Bits 7:0)
703h
Field Name
Rsvd2
HPFOCDIS
Rsvd1
ADCHPFByp
Bits
R/W
Default
Reset
31:8
R
000000h
N/A (Hard-coded)
Reserved.
7
RW
0h
POR - DAFG - ULR
HPF offset calculation disable. 1 = calculation disabled; 0 = calculation en-
abled.
6:2
R
00h
N/A (Hard-coded)
Reserved.
1:0
RW
1h
POR - DAFG - ULR
Processing State: 00b= bypass the ADC HPF ("off"), 01b-11b= ADC HPF is en-
abled ("on" or "benign").
7.17.5. ADC0 (NID = 15h): PwrState
Reg Byte 4 (Bits 31:24) Byte 3 (Bits 23:16) Byte 2 (Bits 15:8)
Set
Get
F0500h
Byte 1 (Bits 7:0)
705h
IDT CONFIDENTIAL
187
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
V 0.995 01/11
92HD81