92HD81 Datasheet, PDF (23/279 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM

92HD81
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
ADC will be brought back to a full power state and allowed to stabilize before switching from the dig-
ital microphone to the analog input. This should take less than 10mS.
DMIC pin widgets support port presence detect directly using SENSE-B input.
The codec supports the following digital microphone configurations:
Digital Mics
0
1
2
3
4
Data Sample
N/A
Single Edge
Double Edge on
either DMIC_0 or
1
Double Edge on
one DMIC pin and
Single Edge on
the second DMIC
pin.
Double Edge
ADC Conn.
Notes
N/A No Digital Microphones
0, or 1 Available on either DMIC_0 or DMIC_1
When using a microphone that supports multiplexed operation (2-mics
can share a common data line), configure the microphone for “Left” and
select mono operation using the vendor specific verb.
“Left” D-mic data is used for ADC left and right channels.
0, or 1
Available on either DMIC_0 or DMIC_1, External logic required to support
sampling on a single Digital Mic pin channel on rising edge and second
Digital Mic right channel on falling edge of DMIC_CLK for those digital
microphones that don’t support alternative clock edge (multiplexed output)
capability.
0, or 1
Requires both DMIC_0 and DMIC_1, External logic required to support
sampling on a single Digital Mic pin channel on rising edge and second
Digital Mic right channel on falling edge of DMIC_CLK for those digital
microphones that don’t support alternative clock edge (multiplexed output)
capability. Two ADC units are required to support this configuration
0, or 1
Connected to DMIC_0 and DMIC_1, External logic required to support
sampling on a single Digital Mic pin channel on rising edge and second
Digital Mic right channel on falling edge of DMIC_CLK for those digital
microphones that don’t support alternative clock edge capability. Two
ADC units are required to support this configuration
Power State DMIC Widget
Enabled?
DMIC_CLK
Output
DMIC_0,1
Notes
D0
Yes
Clock Capable Input Capable DMIC_CLK Output is Enabled when either DMIC_0 or
DMIC_1 Input Widget is Enabled. Otherwise, the
DMIC_CLK remains Low
D1-D3
Yes
Clock
Disabled
Input Disabled DMIC_CLK is HIGH-Z with Weak Pull-down
D0-D3
No
Clock
Disabled
Input Disabled DMIC_CLK is HIGH-Z with Weak Pull-down
D4
-
Clock
Input Disabled DMIC_CLK is HIGH-Z with Weak Pull-down
Disabled
D5
-
Clock
Input Disabled DMIC_CLK is HIGH-Z with Weak Pull-down
Disabled
IDT CONFIDENTIAL
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©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
V 0.995 01/11
92HD81