ICS8714004I Datasheet, PDF (27/31 Pages) Integrated Device Technology – Output frequency range

ICS8714004I Data Sheet
FemtoCLock^® Zero Delay Buffer/Clock Generator for PCI Express™ and Ethernet
3. Calculations and Equations.
The purpose of this section is to calculate power dissipation on the IC per HCSL output pair.
HCSL output driver circuit and termination are shown in Figure 8.
VDD
I_OUT = 17mA
R_REF =
475 ± 1%
V_OUT
R_L
50
IC
Figure 8. HCSL Driver Circuit and Termination
HCSL is a current steering output which sources a maximum of 17mA of current per output. To calculate worst case on-chip power dissipation,
use the following equations which assume a 50 load to ground.
The highest power dissipation occurs when V_DD__MAX.
Power = (V_{DD_MAX} – V_OUT) * I_OUT,
since V_OUT = I_OUT * R_L
= (V_{DD_MAX –} I_OUT * R_L) * I_OUT
= (3.465V – 17mA * 50) * 17mA
Total Power Dissipation per output pair = 44.5mW
ICS8714004DKI REVISION A MARCH 24, 2014
27
©2014 Integrated Device Technology, Inc.